// Copyright (c) 2024，D-Robotics.
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

/***************************************************************************
* COPYRIGHT NOTICE
* Copyright 2019 Horizon Robotics, Inc.
* All rights reserved.
***************************************************************************/
#ifndef UTILITY_SENSOR_INC_AR0820_SETTING_H_
#define UTILITY_SENSOR_INC_AR0820_SETTING_H_

#define AR0820_PARAM_HOLD       (0x3022)
#define AR0820_GAIN         	(0x3366)
#define AR0820_FINE_GAIN	(0x336a)
#define AR0820_DGAIN		(0x3308)
#define AR0820_DC_GAIN		(0x3362)
#define AR0820_LINE             (0x3012)
#define AR0820_LINE_S           (0x3212)
#define AR0820_VTS	          	(0x300A)
#define AR0820_HTS	        	(0x300C)
#define AR0820_X_START          (0x3004)
#define AR0820_Y_START          (0x3002)
#define AR0820_X_END            (0x3008)
#define AR0820_Y_END            (0x3006)
#define REG_EXP_NUM             (0x3082)
#define VT_PIX_CLK_DIV          (0x302A)
#define VT_SYS_CLK_DIV          (0x302C)
#define PRE_PLL_CLK_DIV         (0x302E)
#define PLL_MULTIPLIER          (0x3030)

#define EEPROM_IIC_ADDR_READ 	(0x50)
#define VERSION_ADDR 			(0x0000)
#define VENDOR_ADDR 			(0x0004)
#define MODULE_SERIAL_ADDR 		(0x0008)
#define CAM_TYPE_ADDR 			(0x0010)
#define IMG_HEIGHT_ADDR 		(0x001C)
#define IMG_WIDTH_ADDR 			(0x001E)
#define FOV_ADDR 				(0x0020)
#define EFL_X_ADDR 				(0x0040)
#define EFL_Y_ADDR 				(0x0048)
#define COD_X_ADDR 				(0x0050)
#define COD_Y_ADDR 				(0x0058)
#define K1_ADDR 				(0x00C0)
#define K2_ADDR 				(0x00C8)
#define P1_ADDR 				(0x00D0)
#define P2_ADDR 				(0x00D8)
#define K3_ADDR 				(0x00E0)
#define K4_ADDR 				(0x00E8)
#define K5_ADDR 				(0x00F0)
#define K6_ADDR 				(0x00F8)

#define BIT(i)		(1 << (i))
#define XO_25MHZ 	BIT(0)
#define TEST_PATTERN	BIT(1)
#define FPS_DIV		BIT(2)
#define DPHY_PORTB		BIT(3)
#define DPHY_COPY		BIT(4)
#define SCALER_WEIGHT9331	BIT(5)
#define SCALER_TRUE_BAYER	BIT(6)
#define SCALER_WEIGHT2110 	BIT(7)
#define PWL_HDR4_24BIT		BIT(8)

#define EXT_MASK	(0xFFFFFC00)
#define EXT_OFFS	(10)

// config_index bit[8~11] reserved for camera trig mode
#define TRIG_STANDARD       BIT(8)
#define TRIG_SHUTTER_SYNC   BIT(9)

#define MAX9296_MFP_NUM 12u
#define MAX9296_MFP_OFFSET 3u

#define MAX96712_MFP_NUM 16u
#define MAX96712_MFP_LOOP 5u
#define MAX96712_MFP_OFFSET 0x10
#define RETRY_POC_TIMES 3
#define POC_REG_WIDTH       REG8_VAL8
#define POC_RETRY_POLICY 1

uint32_t poc_init_setting[] = {
	0x01, 0x00,
	0x01, 0x1f,
};
static uint32_t max9295_ldo_enable[] = {
	0x10, 0x04, 0x04,
	0x12, 0x10, 0x10,
};
enum AR0820 {
	INCEPTIO = 0,
	NURO,
	WEISEN,
	CONTI,
	SENSING,
	WEISEN_DUAL,
	SENSING_DUAL,
	SENSING_WS0233,
	WEISEN_WS0233,
	SENSING_RAW12_EMB,
	SENSING_RAW16_EMB,
	WEISEN_RAW12_EMB,
	GALAXY_WITH_GAX3C,
	GALAXY_SEPA_GAX3C,
	GALAXY,
	GALAXY_WITH_GA0233,
	GALAXY_SEPA_GA0233,
};

typedef struct reg_setting_data {
	uint32_t *pdata;
	uint32_t size;
}reg_setting_data_t;

uint32_t rccb_ar0820_dcgain[] = {
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,

	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
};

uint32_t rccb_ar0820_gain[] = {
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x0,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,

};
uint32_t rccb_ar0820_fine_gain[] = {
	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xDDD,
	0xEEE,
	0xFFF,

	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xDDD,
	0xEEE,
	0xFFF,

	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xEEE,
	0xEEE,
	0xFFF,
	0xFFF,

	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
};

uint32_t rccb_ar0820_dgain[] = {
	0x200,
	0x20B,
	0x216,
	0x202,
	0x20D,
	0x219,
	0x207,
	0x213,
	0x200,
	0x20E,
	0x21B,
	0x209,
	0x217,
	0x206,
	0x215,
	0x204,
	0x20E,
	0x203,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x20F,
	0x206,
	0x211,
	0x209,
	0x202,
	0x20D,
	0x206,
	0x211,
	0x20B,
	0x205,
	0x200,
	0x20B,
	0x216,
	0x202,
	0x20D,
	0x219,
	0x206,
	0x211,
	0x201,
	0x20C,
	0x217,
	0x208,
	0x231,
	0x205,
	0x210,
	0x203,
	0x20E,
	0x203,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x210,
	0x207,
	0x212,
	0x209,
	0x202,
	0x20D,
	0x206,
	0x212,
	0x20B,
	0x205,
	0x200,
	0x20B,
	0x216,
	0x202,
	0x20D,
	0x219,
	0x206,
	0x212,
	0x201,
	0x20C,
	0x217,
	0x208,
	0x213,
	0x205,
	0x211,
	0x203,
	0x20E,
	0x202,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x210,
	0x206,
	0x212,
	0x209,
	0x202,
	0x20D,
	0x206,
	0x211,
	0x20B,
	0x205,
	0x210,
	0x21C,
	0x228,
	0x234,
	0x240,
	0x24D,
	0x25A,
	0x267,
	0x274,
	0x282,
	0x290,
	0x29F,
	0x2AD,
	0x2BC,
	0x2CC,
	0x2DB,
	0x2EB,
	0x2FC,
	0x30C,
	0x31E,
	0x32F,
	0x341,
	0x353,
	0x366,
	0x379,
	0x38C,
	0x3A0,
	0x3B4,
	0x3C9,
	0x3DE,
	0x3F4,
	0x40A,
	0x421,
	0x438,
	0x450,
	0x468,
	0x481,
	0x49A,
	0x4B4,
	0x4CE,
	0x4E9,
	0x504,
	0x521,
	0x53D,
	0x55B,
	0x579,
	0x598,
	0x5B7,
	0x5D7,
	0x5F7,
	0x619,
	0x63B,
	0x65E,
	0x682,
	0x6A6,
	0x6CB,
	0x6F2,
	0x718,
	0x740,
	0x769,
	0x792,
	0x7BD,
	0x7E8,
};

uint32_t rggb_ar0820_dcgain[] = {
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
	0xf,
};

uint32_t rggb_ar0820_gain[] = {
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
	0x333,
};

uint32_t rggb_ar0820_fine_gain[] = {
	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xDDD,
	0xEEE,
	0xFFF,
	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xDDD,
	0xEEE,
	0xFFF,
	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xEEE,
	0xEEE,
	0xFFF,
	0x000,
	0x000,
	0x000,
	0x111,
	0x111,
	0x111,
	0x222,
	0x222,
	0x333,
	0x333,
	0x333,
	0x444,
	0x444,
	0x555,
	0x555,
	0x666,
	0x666,
	0x777,
	0x777,
	0x888,
	0x888,
	0x999,
	0x999,
	0xAAA,
	0xAAA,
	0xBBB,
	0xCCC,
	0xCCC,
	0xDDD,
	0xDDD,
	0xEEE,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
	0xFFF,
};

uint32_t rggb_ar0820_dgain[] = {
	0x200,
	0x20B,
	0x216,
	0x202,
	0x20D,
	0x219,
	0x207,
	0x213,
	0x200,
	0x20E,
	0x21B,
	0x209,
	0x217,
	0x206,
	0x215,
	0x204,
	0x20E,
	0x203,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x20F,
	0x206,
	0x211,
	0x209,
	0x202,
	0x20D,
	0x206,
	0x211,
	0x20B,
	0x205,
	0x200,
	0x20B,
	0x216,
	0x202,
	0x20D,
	0x219,
	0x206,
	0x211,
	0x201,
	0x20C,
	0x217,
	0x208,
	0x231,
	0x205,
	0x210,
	0x203,
	0x20E,
	0x203,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x210,
	0x207,
	0x212,
	0x209,
	0x202,
	0x20D,
	0x206,
	0x212,
	0x20B,
	0x205,
	0x200,
	0x20B,
	0x216,
	0x202,
	0x20D,
	0x219,
	0x206,
	0x212,
	0x201,
	0x20C,
	0x217,
	0x208,
	0x213,
	0x205,
	0x211,
	0x203,
	0x20E,
	0x202,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x210,
	0x206,
	0x212,
	0x209,
	0x202,
	0x20D,
	0x206,
	0x211,
	0x20B,
	0x205,
	0x200,
	0x20b,
	0x216,
	0x201,
	0x20d,
	0x219,
	0x206,
	0x211,
	0x200,
	0x20c,
	0x217,
	0x207,
	0x213,
	0x204,
	0x210,
	0x203,
	0x20E,
	0x202,
	0x20E,
	0x203,
	0x20E,
	0x204,
	0x20F,
	0x206,
	0x211,
	0x209,
	0x201,
	0x20d,
	0x206,
	0x211,
	0x20a,
	0x205,
	0x210,
	0x21c,
	0x227,
	0x234,
	0x240,
	0x24c,
	0x259,
	0x267,
	0x274,
	0x282,
	0x290,
	0x29e,
	0x2ad,
	0x2bc,
	0x2cb,
	0x2db,
	0x2eb,
	0x2fb,
	0x30c,
	0x31d,
	0x32f,
	0x340,
	0x353,
	0x365,
	0x378,
	0x38c,
	0x3a0,
	0x3b4,
	0x3c9,
	0x3de,
	0x3f4,
	0x40a,
	0x421,
	0x438,
	0x44f,
	0x468,
	0x480,
	0x499,
	0x4b3,
	0x4ce,
	0x4e9,
	0x504,
	0x520,
	0x53d,
	0x55a,
	0x578,
	0x597,
	0x5b6,
	0x5d6,
	0x5f7,
	0x619,
	0x63b,
	0x65e,
	0x681,
	0x6a6,
	0x6cb,
	0x6f1,
	0x718,
	0x740,
	0x769,
	0x792,
	0x7bd,
	0x7e8,
};

uint32_t rggb_ar0820_hdr4_gain[] = {
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x0000,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x1111,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x2222,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
	0x3333,
};

uint32_t rggb_ar0820_hdr4_fine_gain[] = {
	0x0000,
	0x0000,
	0x0000,
	0x1111,
	0x1111,
	0x1111,
	0x2222,
	0x2222,
	0x3333,
	0x3333,
	0x3333,
	0x4444,
	0x4444,
	0x5555,
	0x5555,
	0x6666,
	0x6666,
	0x7777,
	0x7777,
	0x8888,
	0x8888,
	0x9999,
	0x9999,
	0xAAAA,
	0xAAAA,
	0xBBBB,
	0xCCCC,
	0xCCCC,
	0xDDDD,
	0xDDDD,
	0xEEEE,
	0xFFFF,
	0x0000,
	0x0000,
	0x0000,
	0x1111,
	0x1111,
	0x1111,
	0x2222,
	0x2222,
	0x3333,
	0x3333,
	0x3333,
	0x4444,
	0x4444,
	0x5555,
	0x5555,
	0x6666,
	0x6666,
	0x7777,
	0x7777,
	0x8888,
	0x8888,
	0x9999,
	0x9999,
	0xAAAA,
	0xAAAA,
	0xBBBB,
	0xCCCC,
	0xCCCC,
	0xDDDD,
	0xDDDD,
	0xEEEE,
	0xFFFF,
	0x0000,
	0x0000,
	0x0000,
	0x1111,
	0x1111,
	0x1111,
	0x2222,
	0x2222,
	0x3333,
	0x3333,
	0x3333,
	0x4444,
	0x4444,
	0x5555,
	0x5555,
	0x6666,
	0x6666,
	0x7777,
	0x7777,
	0x8888,
	0x8888,
	0x9999,
	0x9999,
	0xAAAA,
	0xAAAA,
	0xBBBB,
	0xCCCC,
	0xCCCC,
	0xDDDD,
	0xEEEE,
	0xEEEE,
	0xFFFF,
	0x0000,
	0x0000,
	0x0000,
	0x1111,
	0x1111,
	0x1111,
	0x2222,
	0x2222,
	0x3333,
	0x3333,
	0x3333,
	0x4444,
	0x4444,
	0x5555,
	0x5555,
	0x6666,
	0x6666,
	0x7777,
	0x7777,
	0x8888,
	0x8888,
	0x9999,
	0x9999,
	0xAAAA,
	0xAAAA,
	0xBBBB,
	0xCCCC,
	0xCCCC,
	0xDDDD,
	0xDDDD,
	0xEEEE,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
	0xFFFF,
};

uint8_t conti_max9296_max9295_init_setting[] = {
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	0x04, 0xc4, 0x03, 0x11, 0x20,
	0x04, 0xc4, 0x03, 0x08, 0x62,
	0x04, 0xc4, 0x00, 0x02, 0x23,
	0x04, 0xc4, 0x03, 0x16, 0x6c,

	0x04, 0xc4, 0x03, 0x32, 0x20,
	0x04, 0xc4, 0x03, 0x33, 0x0D,

	0x04, 0xc4, 0x03, 0x34, 0x60,
	0x04, 0xc4, 0x03, 0x35, 0x07,

	0x04, 0xc4, 0x02, 0xbe, 0x80,
	0x04, 0xc4, 0x02, 0xbf, 0x20,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,

	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x03, 0x39, 0x80,
	0x04, 0x90, 0x03, 0x3a, 0x42,
	0x04, 0x90, 0x00, 0x52, 0x81,
	0x04, 0x90, 0x03, 0x20, 0x2C,
	0x04, 0x90, 0x03, 0x23, 0x2C,
	0x04, 0x90, 0x03, 0x25, 0x80,

	0x04, 0xc4, 0x03, 0xF1, 0x89,
	0x04, 0xc4, 0x02, 0xBE, 0x90,
	0x00, 0xff,
};

uint8_t inceptio_max9296_max9295_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0x32,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0x32,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0x32,
	0x00, 0x32,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// MAX9295 - Serializer config

	0x04, 0xc4, 0x03, 0x11, 0x20,	 // start x/y/z/u from B,20
	0x04, 0xc4, 0x03, 0x08, 0x62,	 // x/y/z/u selected B,62
	0x04, 0xc4, 0x00, 0x02, 0x23,	 // Video transmit enable  //transmit Y,23

	0x04, 0xc4, 0x03, 0x16, 0x6c,

	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x03, 0x39, 0x80,
	0x04, 0x90, 0x03, 0x3a, 0x42,
	0x04, 0x90, 0x00, 0x52, 0x81,
	0x04, 0x90, 0x03, 0x20, 0x2C, 	// MIPI CSI Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2C, 	// MIPI CSI Port B 1.2G
	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t inceptio_max9296_max9295_init_setting_raw16_emb[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x03, 0x11, 0x60, 	// start y/z from B,60
	0x04, 0xc4, 0x03, 0x08, 0x66, 	// y/z selected B,66
	0x04, 0xc4, 0x00, 0x02, 0x63, 	// Video transmit enable Y+Z,63

	0x04, 0xc4, 0x03, 0x0b, 0x01, 	// y: vc0
	0x04, 0xc4, 0x03, 0x0c, 0x00,
	0x04, 0xc4, 0x03, 0x16, 0x6e, 	// y: raw16
	0x04, 0xc4, 0x03, 0x0d, 0x01, 	// z: vc0
	0x04, 0xc4, 0x03, 0x0e, 0x00,
	0x04, 0xc4, 0x03, 0x18, 0x52, 	// z: emb
	0x04, 0xc4, 0x03, 0x12, 0x04, 	// z: send 8bit pixels as 16bit
	0x04, 0xc4, 0x03, 0x1e, 0x30, 	// z: soft bpp: 16bit

	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,

	0x04, 0x90, 0x03, 0x14, 0x00, 	// y: vc0
	0x04, 0x90, 0x03, 0x15, 0x01, 	// z: vc1
	0x04, 0x90, 0x03, 0x16, 0x80, 	// y dt: 0x2e(10 1110) (10|000000)
	0x04, 0x90, 0x03, 0x17, 0x4E, 	// z dt: 0x12(0100 10) (0100|1110)
	0x04, 0x90, 0x03, 0x18, 0x02, 	//                     (000000|10)
	0x04, 0x90, 0x03, 0x19, 0x50, 	// y bpp: 0x10(10000)  (010|10000)
	0x04, 0x90, 0x03, 0x1A, 0x00,   // z bpp: 0x8(010 00)  ( 00000|00)
	0x04, 0x90, 0x03, 0x1C, 0x40, 	// z: process bpp8 as 16bit color
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x82,

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x6c, 	// z: soft overfide, Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2c, 	// PortB: 1.2G
	// y map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15, 	// Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2e, 	// SRC  0b00101110, DT = 0x2E VC=0
	0x04, 0x90, 0x04, 0x4E, 0x2e, 	// DEST 0b00101110, DT = 0x2E VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x00, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x01, 	// DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x01, 	// Enable 1 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x01, 	// Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x52, 	// SRC  0b01010010, DT = 0x12 VC=1
	0x04, 0x90, 0x04, 0x8E, 0x12, 	// DEST 0b00010010, DT = 0x12 VC=0
	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t inceptio_max9296_max9295_init_setting_raw12_emb[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x03, 0x11, 0x60, 	// start y/z from B,60
	0x04, 0xc4, 0x03, 0x08, 0x66, 	// y/z selected B,66
	0x04, 0xc4, 0x00, 0x02, 0x63, 	// Video transmit enable Y+Z,63

	0x04, 0xc4, 0x03, 0x0b, 0x01, 	// y: vc0
	0x04, 0xc4, 0x03, 0x0c, 0x00,
	0x04, 0xc4, 0x03, 0x16, 0x6c, 	// y: raw12
	0x04, 0xc4, 0x03, 0x0d, 0x01, 	// z: vc0
	0x04, 0xc4, 0x03, 0x0e, 0x00,
	0x04, 0xc4, 0x03, 0x18, 0x52, 	// z: emb
	0x04, 0xc4, 0x03, 0x1e, 0x2c, 	// z: soft bpp: 12bitS

	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,

	0x04, 0x90, 0x03, 0x14, 0x00, 	// y: vc0
	0x04, 0x90, 0x03, 0x15, 0x01, 	// z: vc1
	0x04, 0x90, 0x03, 0x16, 0x80, 	// y dt: 0x2c(10 1100) (10|000000)
	0x04, 0x90, 0x03, 0x17, 0x4C, 	// z dt: 0x12(0100 10) (0100|1100)
	0x04, 0x90, 0x03, 0x18, 0x02, 	//                     (000000|10)
	0x04, 0x90, 0x03, 0x19, 0x4c, 	// y bpp: 0xc(01100)   (010|01100)
	0x04, 0x90, 0x03, 0x1A, 0x00,   // z bpp: 0x8(010 00)  ( 00000|00)
	0x04, 0x90, 0x03, 0x1C, 0x40, 	// z: process bpp8 as 16bit color
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x82,

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x6c, 	// z: soft overfide, Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2c, 	// PortB: 1.2G
	// y map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15, 	// Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2c, 	// SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4E, 0x2c, 	// DEST 0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x00, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x01, 	// DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x01, 	// Enable 1 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x01, 	// Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x52, 	// SRC  0b01010010, DT = 0x12 VC=1
	0x04, 0x90, 0x04, 0x8E, 0x12, 	// DEST 0b00010010, DT = 0x12 VC=0
	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t inceptio_max9296_max9295_2vc_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	0x04, 0x90, 0x03, 0x02, 0x10,
	0x04, 0xc4, 0x03, 0x02, 0x10,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x00, 0x10, 0x15,
	0x04, 0xc4, 0x00, 0x12, 0x14,
	0x04, 0xc4, 0x03, 0x11, 0x60, 	// start y/z from B,60
	0x04, 0xc4, 0x03, 0x08, 0x66, 	// y/z selected B,66
	0x04, 0xc4, 0x00, 0x02, 0x63, 	// Video transmit enable Y+Z,63

	0x04, 0xc4, 0x03, 0x0b, 0x02, 	// y: vc1
	0x04, 0xc4, 0x03, 0x0c, 0x00,
	0x04, 0xc4, 0x03, 0x16, 0x6c,
	0x04, 0xc4, 0x03, 0x0d, 0x01, 	// z: vc0
	0x04, 0xc4, 0x03, 0x0e, 0x00,
	0x04, 0xc4, 0x03, 0x18, 0x6c,

	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x16, 0x80, 	// y dt: 0x2c (x dt: 0x00)
	0x04, 0x90, 0x03, 0x17, 0xBC, 	// z dt: 0x2c
	0x04, 0x90, 0x03, 0x18, 0x00, 	// (u dt: 0x00)
	0x04, 0x90, 0x03, 0x19, 0x6C, 	// y z dt: 12
	0x04, 0x90, 0x03, 0x1A, 0x00,
	0x04, 0x90, 0x03, 0x14, 0x10, 	// y: vc1
	0x04, 0x90, 0x03, 0x15, 0x00, 	// z: vc0
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x82,

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x6c, 	// z: soft overfide, Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2c, 	// PortB: 1.2G

	// y map to vc1 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15, 	// Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x6C, 	// SRC  0b00101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x4E, 0x6C, 	// DEST 0b00101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x4F, 0x40, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x40, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x41, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x41, 	// DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x15, 	// Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x2C, 	// SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8E, 0x2C, 	// DEST 0b01101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8F, 0x00, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x90, 0x00, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x91, 0x01, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x92, 0x01, 	// DEST DT = Frame End

	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t max9296_add_max96718_init_setting[] = {
	0x04, 0x90, 0x01, 0x61, 0x09,
};

#if 0
uint8_t weisen_max9296_max9295_init_setting[] = {
	// reset 0820
	0x03, 0x50, 0x01, 0x00,
	0x00, 0x32,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0x32,
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0x32,
	0x00, 0x32,

	0x04, 0x90, 0x03, 0x02, 0x10,
	0x04, 0xc4, 0x03, 0x02, 0x10,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x00, 0x10, 0x15,
	0x04, 0xc4, 0x00, 0x12, 0x14,
	0x04, 0xc4, 0x03, 0x11, 0x20,	 // start x/y/z/u from B,20
	0x04, 0xc4, 0x03, 0x08, 0x62,	 // x/y/z/u selected B,62
	0x04, 0xc4, 0x00, 0x02, 0x23,	 // Video transmit enable  //transmit Y,23

	0x04, 0xc4, 0x03, 0x16, 0x6c,

	0x04, 0xc4, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0xc4, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x00, 0x52, 0x81,  	// set pipe Z stream ID
	0x04, 0x90, 0x03, 0x20, 0x2C, 	// MIPI CSI Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2C, 	// MIPI CSI Port B 1.2G
	0x04, 0x90, 0x03, 0x25, 0x80,
};
#endif

uint8_t weisen_max9296_max9295_init_setting[] = {
// uint8_t galaxy_max9296_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0x32,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0x32,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0x32,
	0x00, 0x32,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	0x04, 0x90, 0x03, 0x02, 0x10,
	0x04, 0xc4, 0x03, 0x02, 0x10,

	// MAX96717 - Serializer config
	0x04, 0xc4, 0x00, 0x10, 0x15,
	0x04, 0xc4, 0x00, 0x12, 0x14,
	0x04, 0xc4, 0x03, 0x11, 0x40,	 // start z from B,20
	0x04, 0xc4, 0x03, 0x08, 0x64,	 // z selected B,62
	0x04, 0xc4, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0xc4, 0x03, 0x18, 0x6c,

	0x04, 0xc4, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0xc4, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x00, 0x51, 0x82,  	// set pipe Y stream ID
	0x04, 0x90, 0x00, 0x52, 0x82,  	// set pipe Z stream ID
	0x04, 0x90, 0x03, 0x20, 0x2C, 	// MIPI CSI Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2C, 	// MIPI CSI Port B 1.2G
	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t weisen_max9296_max9295_init_setting_raw12_emb[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	0x04, 0x90, 0x03, 0x02, 0x10,
	0x04, 0xc4, 0x03, 0x02, 0x10,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x03, 0x11, 0x60, 	// start y/z from B,60
	0x04, 0xc4, 0x03, 0x08, 0x66, 	// y/z selected B,66
	0x04, 0xc4, 0x00, 0x02, 0x63, 	// Video transmit enable Y+Z,63

	0x04, 0xc4, 0x03, 0x0b, 0x01, 	// y: vc0
	0x04, 0xc4, 0x03, 0x0c, 0x00,
	0x04, 0xc4, 0x03, 0x16, 0x6c, 	// y: raw12
	0x04, 0xc4, 0x03, 0x0d, 0x01, 	// z: vc0
	0x04, 0xc4, 0x03, 0x0e, 0x00,
	0x04, 0xc4, 0x03, 0x18, 0x52, 	// z: emb
	0x04, 0xc4, 0x03, 0x1e, 0x2c, 	// z: soft bpp: 12bitS

	0x04, 0xc4, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0xc4, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,

	0x04, 0x90, 0x03, 0x14, 0x00, 	// y: vc0
	0x04, 0x90, 0x03, 0x15, 0x01, 	// z: vc1
	0x04, 0x90, 0x03, 0x16, 0x80, 	// y dt: 0x2c(10 1100) (10|000000)
	0x04, 0x90, 0x03, 0x17, 0x4C, 	// z dt: 0x12(0100 10) (0100|1100)
	0x04, 0x90, 0x03, 0x18, 0x02, 	//                     (000000|10)
	0x04, 0x90, 0x03, 0x19, 0x4c, 	// y bpp: 0xc(01100)   (010|01100)
	0x04, 0x90, 0x03, 0x1A, 0x00,   // z bpp: 0x8(010 00)  ( 00000|00)
	0x04, 0x90, 0x03, 0x1C, 0x40, 	// z: process bpp8 as 16bit color
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x82,

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x6c, 	// z: soft overfide, Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2c, 	// PortB: 1.2G
	// y map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15, 	// Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2c, 	// SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4E, 0x2c, 	// DEST 0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x00, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x01, 	// DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x01, 	// Enable 1 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x01, 	// Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x52, 	// SRC  0b01010010, DT = 0x12 VC=1
	0x04, 0x90, 0x04, 0x8E, 0x12, 	// DEST 0b00010010, DT = 0x12 VC=0
	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t weisen_max9296_max9295_2vc_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	0x04, 0x90, 0x03, 0x02, 0x10,
	0x04, 0xc4, 0x03, 0x02, 0x10,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x00, 0x10, 0x15,
	0x04, 0xc4, 0x00, 0x12, 0x14,
	0x04, 0xc4, 0x03, 0x11, 0x60, 	// start y/z from B,60
	0x04, 0xc4, 0x03, 0x08, 0x66, 	// y/z selected B,66
	0x04, 0xc4, 0x00, 0x02, 0x63, 	// Video transmit enable Y+Z,63

	0x04, 0xc4, 0x03, 0x0b, 0x02, 	// y: vc1
	0x04, 0xc4, 0x03, 0x0c, 0x00,
	0x04, 0xc4, 0x03, 0x16, 0x6c,
	0x04, 0xc4, 0x03, 0x0d, 0x01, 	// z: vc0
	0x04, 0xc4, 0x03, 0x0e, 0x00,
	0x04, 0xc4, 0x03, 0x18, 0x6c,

	0x04, 0xc4, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0xc4, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x54, 0x80,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x16, 0x80, 	// y dt: 0x2c (x dt: 0x00)
	0x04, 0x90, 0x03, 0x17, 0xBC, 	// z dt: 0x2c
	0x04, 0x90, 0x03, 0x18, 0x00, 	// (u dt: 0x00)
	0x04, 0x90, 0x03, 0x19, 0x6C, 	// y z dt: 12
	0x04, 0x90, 0x03, 0x1A, 0x00,
	0x04, 0x90, 0x03, 0x14, 0x10, 	// y: vc1
	0x04, 0x90, 0x03, 0x15, 0x00, 	// z: vc0
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x82,

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x6C, 	// z: soft overfide, Port A 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2C, 	// PortB: 1.2G

	// y map to vc1 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15, 	// Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x6C, 	// SRC  0b00101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x4E, 0x6C, 	// DEST 0b00101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x4F, 0x40, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x40, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x41, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x41, 	// DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x07, 	// Enable 3 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x15, 	// Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x2C, 	// SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8E, 0x2C, 	// DEST 0b01101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8F, 0x00, 	// SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x90, 0x00, 	// DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x91, 0x01, 	// SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x92, 0x01, 	// DEST DT = Frame End

	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t max9296_phy_portb_init_setting[] = {
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x82,
};

uint8_t max9296_phy_portall_init_setting[] = {
	0x04, 0x90, 0x00, 0x51, 0x81,
	0x04, 0x90, 0x00, 0x52, 0x81,
};

uint8_t weisen_max9296_max9295_dual_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// LINKA: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x01,
	0x04, 0x90, 0x00, 0x10, 0x21,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x32,
	0x04, 0x82, 0x00, 0x45, 0x30,

	// split mode.
	0x04, 0x82, 0x00, 0x6B, 0x16,
	0x04, 0x82, 0x00, 0x73, 0x17,
	0x04, 0x82, 0x00, 0x7B, 0x36,
	0x04, 0x82, 0x00, 0x83, 0x36,
	0x04, 0x82, 0x00, 0x93, 0x36,
	0x04, 0x82, 0x00, 0x9B, 0x36,
	0x04, 0x82, 0x00, 0xA3, 0x36,
	0x04, 0x82, 0x00, 0xAB, 0x36,
	0x04, 0x82, 0x00, 0x8B, 0x36,
	0x00, 0x32,

	// LINKB: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x02,
	0x04, 0x90, 0x00, 0x10, 0x22,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x34,
	0x04, 0x84, 0x00, 0x45, 0x30,

	// LINKA + LINKB: MAX9295A config.
	0x04, 0x90, 0x00, 0x10, 0x23,
	0x00, 0x5F,

	// LinkA: MAX9295 - Serializer config
	0x04, 0x82, 0x00, 0x10, 0x15,
	0x04, 0x82, 0x00, 0x12, 0x14,
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,

	// LinkB: MAX9295 - Serializer config
	0x04, 0x84, 0x00, 0x10, 0x15,
	0x04, 0x84, 0x00, 0x12, 0x14,
	0x04, 0x84, 0x03, 0x11, 0x20,	 // start x/y/z/u from B,20
	0x04, 0x84, 0x03, 0x08, 0x62,	 // x/y/z/u selected B,62
	0x04, 0x84, 0x00, 0x02, 0x23,	 // Video transmit enable  //transmit Y,23

	0x04, 0x84, 0x03, 0x16, 0x6c,

	0x04, 0x84, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x84, 0x02, 0xD6, 0x9C,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x16, 0x80,	// y dt: 0x2c (x dt: 0x00)
	0x04, 0x90, 0x03, 0x17, 0xBC,	// z dt: 0x2c
	0x04, 0x90, 0x03, 0x18, 0x00,	// (u dt: 0x00)
	0x04, 0x90, 0x03, 0x19, 0x6C,	// y z dt: 12
	0x04, 0x90, 0x03, 0x1A, 0x00,
	0x04, 0x90, 0x03, 0x14, 0x10,	// y: vc1
	0x04, 0x90, 0x03, 0x15, 0x00,   // z: vc0

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x79, 	// z: soft overfide, Port A 2.5G
	0x04, 0x90, 0x03, 0x23, 0x39,   // PortB: 2.5G

	// y map to vc1 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07,   // Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15,   // Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2C,   // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4E, 0x6C,   // DEST 0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00,   // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x40,   // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01,   // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x41,   // DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x07,     // Enable 3 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x15,     // Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x2C,     // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8E, 0x2C,     // DEST 0b01101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x8F, 0x00,     // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x90, 0x00,     // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x91, 0x01,     // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x92, 0x01,     // DEST DT = Frame End

	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t sensing_max9296_max9295_dual_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// LINKA: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x01,
	0x04, 0x90, 0x00, 0x10, 0x21,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	// split mode.
	0x04, 0x82, 0x00, 0x6B, 0x16,
	0x04, 0x82, 0x00, 0x73, 0x17,
	0x04, 0x82, 0x00, 0x7B, 0x36,
	0x04, 0x82, 0x00, 0x83, 0x36,
	0x04, 0x82, 0x00, 0x93, 0x36,
	0x04, 0x82, 0x00, 0x9B, 0x36,
	0x04, 0x82, 0x00, 0xA3, 0x36,
	0x04, 0x82, 0x00, 0xAB, 0x36,
	0x04, 0x82, 0x00, 0x8B, 0x36,
	0x00, 0x32,

	// LINKB: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x02,
	0x04, 0x90, 0x00, 0x10, 0x22,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	// LINKA + LINKB: MAX9295A config.
	0x04, 0x90, 0x00, 0x10, 0x23,
	0x00, 0x5F,

	0x04, 0x82, 0x03, 0x11, 0x20,	 // start x/y/z/u from B,20
	0x04, 0x82, 0x03, 0x08, 0x62,	 // x/y/z/u selected B,62
	0x04, 0x82, 0x00, 0x02, 0x23,	 // Video transmit enable  //transmit Y,23

	0x04, 0x82, 0x03, 0x16, 0x6c,

	0x04, 0x82, 0x03, 0xf0, 0x51,
	0x04, 0x82, 0x00, 0x03, 0x03,
	0x04, 0x82, 0x00, 0x06, 0xb1,
	0x04, 0x82, 0x02, 0xbe, 0x18,
	0x04, 0x82, 0x02, 0xbf, 0x60,
	0x04, 0x82, 0x00, 0x57, 0x02,    // Pipe Y ID = 2

	0x04, 0x84, 0x03, 0x11, 0x20,	 // start x/y/z/u from B,20
	0x04, 0x84, 0x03, 0x08, 0x62,	 // x/y/z/u selected B,62
	0x04, 0x84, 0x00, 0x02, 0x23,	 // Video transmit enable  //transmit Y,23

	0x04, 0x84, 0x03, 0x16, 0x6c,

	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x00, 0x03, 0x03,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xbe, 0x18,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x16, 0x80,	// y dt: 0x2c (x dt: 0x00)
	0x04, 0x90, 0x03, 0x17, 0xBC,	// z dt: 0x2c
	0x04, 0x90, 0x03, 0x18, 0x00,	// (u dt: 0x00)
	0x04, 0x90, 0x03, 0x19, 0x6C,	// y z dt: 12
	0x04, 0x90, 0x03, 0x1A, 0x00,
	0x04, 0x90, 0x03, 0x14, 0x10,	// y: vc1
	0x04, 0x90, 0x03, 0x15, 0x00,   // z: vc0

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x79, 	// z: soft overfide, Port A 2.5G
	0x04, 0x90, 0x03, 0x23, 0x39,   // PortB: 2.5G

	// y map to vc1 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07,   // Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15,   // Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2C,   // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4E, 0x6C,   // DEST 0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00,   // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x40,   // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01,   // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x41,   // DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x07,     // Enable 3 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x15,     // Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x2C,     // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8E, 0x2C,     // DEST 0b01101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x8F, 0x00,     // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x90, 0x00,     // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x91, 0x01,     // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x92, 0x01,     // DEST DT = Frame End

	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t sensing_max9296_max9295_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x80, 0x00, 0x01, 0x04,	// 9295: GMSL2 3Gbps.
	0x04, 0x90, 0x00, 0x01, 0x01,	// 9296: GMSL2 3Gbps.
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// LINKA: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x01,
	0x04, 0x90, 0x00, 0x10, 0x21,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	// split mode.
	0x04, 0x82, 0x00, 0x6B, 0x16,
	0x04, 0x82, 0x00, 0x73, 0x17,
	0x04, 0x82, 0x00, 0x7B, 0x36,
	0x04, 0x82, 0x00, 0x83, 0x36,
	0x04, 0x82, 0x00, 0x93, 0x36,
	0x04, 0x82, 0x00, 0x9B, 0x36,
	0x04, 0x82, 0x00, 0xA3, 0x36,
	0x04, 0x82, 0x00, 0xAB, 0x36,
	0x04, 0x82, 0x00, 0x8B, 0x36,
	0x00, 0x32,

	// LINKB: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x02,
	0x04, 0x90, 0x00, 0x10, 0x22,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	// LINKA + LINKB: MAX9295A+MAX96717 config.
	0x04, 0x90, 0x00, 0x10, 0x23,
	0x00, 0x5F,

	// MAX9295 - Serializer config
	0x04, 0x82, 0x03, 0x11, 0x40,	// start z from B,20
	0x04, 0x82, 0x03, 0x08, 0x64,	// z selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	// Video transmit enable: z
	0x04, 0x82, 0x03, 0x18, 0x6c,	// z dt: 0x2c
	0x04, 0x82, 0x03, 0xf0, 0x51,
	0x04, 0x82, 0x00, 0x03, 0x03,
	0x04, 0x82, 0x00, 0x06, 0xb1,
	0x04, 0x82, 0x02, 0xbe, 0x18,
	0x04, 0x82, 0x02, 0xbf, 0x60,

	// MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x00, 0x02, 0x43,
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0x18, 0x6C,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x05, 0x70, 0x1C,
	0x04, 0x84, 0x05, 0x70, 0x0C,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xbf, 0x60,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x5B, 0x01,       // Pipe Z ID = 1
	0x00, 0x32,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x16, 0x80,	// y dt: 0x2c (x dt: 0x00)
	0x04, 0x90, 0x03, 0x17, 0xBC,	// z dt: 0x2c
	0x04, 0x90, 0x03, 0x18, 0x00,	// (u dt: 0x00)
	0x04, 0x90, 0x03, 0x19, 0x6C,	// y z dt: 12
	0x04, 0x90, 0x03, 0x1A, 0x00,
	0x04, 0x90, 0x03, 0x14, 0x10,	// y: vc1
	0x04, 0x90, 0x03, 0x15, 0x00,   // z: vc0

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x79, 	// z: soft overfide, Port A 2.5G
	0x04, 0x90, 0x03, 0x23, 0x39,   // PortB: 2.5G

	// y map to vc1 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07,   // Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15,   // Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2C,   // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4E, 0x6C,   // DEST 0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00,   // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x40,   // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01,   // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x41,   // DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x07,     // Enable 3 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x15,     // Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x2C,     // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8E, 0x2C,     // DEST 0b01101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x8F, 0x00,     // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x90, 0x00,     // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x91, 0x01,     // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x92, 0x01,     // DEST DT = Frame End

	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t weisen_max9296_max9295_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x80, 0x00, 0x01, 0x04,	// 9295: GMSL2 3Gbps.
	0x04, 0x90, 0x00, 0x01, 0x01,	// 9296: GMSL2 3Gbps.
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// LINKA: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x01,
	0x04, 0x90, 0x00, 0x10, 0x21,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x32,
	0x04, 0x82, 0x00, 0x45, 0x30,

	// split mode.
	0x04, 0x82, 0x00, 0x6B, 0x16,
	0x04, 0x82, 0x00, 0x73, 0x17,
	0x04, 0x82, 0x00, 0x7B, 0x36,
	0x04, 0x82, 0x00, 0x83, 0x36,
	0x04, 0x82, 0x00, 0x93, 0x36,
	0x04, 0x82, 0x00, 0x9B, 0x36,
	0x04, 0x82, 0x00, 0xA3, 0x36,
	0x04, 0x82, 0x00, 0xAB, 0x36,
	0x04, 0x82, 0x00, 0x8B, 0x36,
	0x00, 0x32,

	// LINKB: MAX9295 - i2c.
	0x04, 0x90, 0x00, 0x10, 0x02,
	0x04, 0x90, 0x00, 0x10, 0x22,
	0x00, 0x32,

	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	// LINKA + LINKB: MAX9295A+MAX96717 config.
	0x04, 0x90, 0x00, 0x10, 0x23,
	0x00, 0x5F,

	// MAX9295 - Serializer config
	0x04, 0x82, 0x00, 0x10, 0x15,
	0x04, 0x82, 0x00, 0x12, 0x14,
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,20
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,62
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Y,23
	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,

	// MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x00, 0x02, 0x43,
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0x18, 0x6C,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x05, 0x70, 0x1C,
	0x04, 0x84, 0x05, 0x70, 0x0C,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xbf, 0x60,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x5B, 0x01,       // Pipe Z ID = 1
	0x00, 0x32,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x16, 0x80,	// y dt: 0x2c (x dt: 0x00)
	0x04, 0x90, 0x03, 0x17, 0xBC,	// z dt: 0x2c
	0x04, 0x90, 0x03, 0x18, 0x00,	// (u dt: 0x00)
	0x04, 0x90, 0x03, 0x19, 0x6C,	// y z dt: 12
	0x04, 0x90, 0x03, 0x1A, 0x00,
	0x04, 0x90, 0x03, 0x14, 0x10,   //  y: vc1
	0x04, 0x90, 0x03, 0x15, 0x00,   //  z: vc0

	0x04, 0x90, 0x03, 0x1D, 0xAC, 	// y: soft override.
	0x04, 0x90, 0x03, 0x20, 0x79, 	// z: soft overfide, Port A 2.5G
	0x04, 0x90, 0x03, 0x23, 0x39,   // PortB: 2.5G

	// y map to vc1 of PortA.
	0x04, 0x90, 0x04, 0x4B, 0x07,   // Enable 3 Mappings
	0x04, 0x90, 0x04, 0x6D, 0x15,   // Destionation Controller = Controller 1. Controller 1 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits =DT
	0x04, 0x90, 0x04, 0x4D, 0x2C,   // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4E, 0x6C,   // DEST 0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x4F, 0x00,   // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x50, 0x40,   // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x51, 0x01,   // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x52, 0x41,   // DEST DT = Frame End

	// z map to vc0 of PortA.
	0x04, 0x90, 0x04, 0x8B, 0x07,     // Enable 3 Mappings
	0x04, 0x90, 0x04, 0xAD, 0x15,     // Destionation Controller = Controller 1. Controller 2 sends data to MIPI Port A
	// For the following MSB 2 bits = VC, LSB 6 bits = DT
	0x04, 0x90, 0x04, 0x8D, 0x2C,     // SRC  0b00101100, DT = 0x2C VC=0
	0x04, 0x90, 0x04, 0x8E, 0x2C,     // DEST 0b01101100, DT = 0x2C VC=1
	0x04, 0x90, 0x04, 0x8F, 0x00,     // SRC  DT = Frame Start
	0x04, 0x90, 0x04, 0x90, 0x00,     // DEST DT = Frame Start
	0x04, 0x90, 0x04, 0x91, 0x01,     // SRC  DT = Frame End
	0x04, 0x90, 0x04, 0x92, 0x01,     // DEST DT = Frame End

	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t nuro_max9296_max9295_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0x32,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0x32,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0x32,
	0x00, 0x32,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x03, 0x32, 0xbe,    // lane map
	0x04, 0xc4, 0x03, 0x33, 0xe1,    // lane map
	0x04, 0xc4, 0x03, 0x11, 0x20,	 // start x/y/z/u from B,20
	0x04, 0xc4, 0x03, 0x08, 0x62,	 // x/y/z/u selected B,62
	0x04, 0xc4, 0x00, 0x02, 0x23,	 // Video transmit enable  //transmit Y,23

	0x04, 0xc4, 0x03, 0x16, 0x6c,

	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,

	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x03, 0x20, 0x2C, 	// 1.2G
	0x04, 0x90, 0x03, 0x23, 0x2C, 	// 1.2G
	0x04, 0x90, 0x03, 0x25, 0x80,
};

uint8_t sensing_max96712_max9295_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x03, 0x11, 0x40, 	// start z from B,20
	0x04, 0xc4, 0x03, 0x08, 0x64, 	// z selected B,62
	0x04, 0xc4, 0x00, 0x02, 0x43, 	// Video transmit z enable
	0x04, 0xc4, 0x03, 0x18, 0x6c, 	// z dt1: 0x2c

	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	0x04, 0xc4, 0x00, 0x58, 0x80,	// z: tx crc.

	// MAX96712 - Deserializer config
	0x04, 0x90, 0x00, 0x06, 0xF1, 	// Enable Link A in GMSL2 mode
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0x62,  	// pipe0: A-Z, pipie1: B-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x01,  	// Turn on pipe 0.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.
	0x04, 0x90, 0x00, 0x61, 0x44,  	// c/d-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 enable.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 1200Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x2C,
	0x04, 0x90, 0x04, 0x18, 0x2C,
	// 0x04, 0x90, 0x04, 0x1B, 0x2C,
	// 0x04, 0x90, 0x04, 0x1E, 0x2C,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t weisen_max96712_max9295_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	// MAX9295 - Serializer config
	0x04, 0xc4, 0x00, 0x10, 0x15,
	0x04, 0xc4, 0x00, 0x12, 0x14,
	0x04, 0xc4, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0xc4, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0xc4, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0xc4, 0x03, 0x18, 0x6c,

	0x04, 0xc4, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0xc4, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0xc4, 0x00, 0x58, 0x80,

	// MAX96712 - Deserializer config
	0x04, 0x90, 0x00, 0x06, 0xF1, 	// Enable Link A in GMSL2 mode
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0x62,  	// pipe0: A-Z, pipie1: B-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x01,  	// Turn on pipe 0.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.
	0x04, 0x90, 0x00, 0x61, 0x44,  	// c/d-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 enable.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 1200Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x2C,
	0x04, 0x90, 0x04, 0x18, 0x2C,
	// 0x04, 0x90, 0x04, 0x1B, 0x2C,
	// 0x04, 0x90, 0x04, 0x1E, 0x2C,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t weisen_max96712_max9295_dual_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF1,     // Link A
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x32,
	0x04, 0x82, 0x00, 0x45, 0x30,

	0x04, 0x90, 0x00, 0x06, 0xF2,     // Link B
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x34,
	0x04, 0x84, 0x00, 0x45, 0x30,

	0x04, 0x90, 0x00, 0x06, 0xF3,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkA: MAX9295 - Serializer config
	0x04, 0x82, 0x00, 0x10, 0x15,
	0x04, 0x82, 0x00, 0x12, 0x14,
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x82, 0x00, 0x58, 0x80,

	// LinkB: MAX9295 - Serializer config
	0x04, 0x84, 0x00, 0x10, 0x15,
	0x04, 0x84, 0x00, 0x12, 0x14,
	0x04, 0x84, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x84, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x84, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x84, 0x03, 0x18, 0x6c,

	0x04, 0x84, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x84, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x84, 0x00, 0x58, 0x80,

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0x62,  	// pipe0: A-Z, pipie1: B-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 enable.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 for Link B
	0x04, 0x90, 0x09, 0x6D, 0x15,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x6C,    // vc = 1
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x40,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x41,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 2500Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x39,
	0x04, 0x90, 0x04, 0x18, 0x39,
	// 0x04, 0x90, 0x04, 0x1B, 0x39,
	// 0x04, 0x90, 0x04, 0x1E, 0x39,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t sensing_max96712_max9295_dual_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF1,     // Link A
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF2,     // Link B
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF3,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkA: MAX9295 - Serializer config
	0x04, 0x82, 0x03, 0x11, 0x40, 	// start z from B,20
	0x04, 0x82, 0x03, 0x08, 0x64, 	// z selected B,62
	0x04, 0x82, 0x00, 0x02, 0x43, 	// Video transmit z enable
	0x04, 0x82, 0x03, 0x18, 0x6c, 	// z dt1: 0x2c

	0x04, 0x82, 0x03, 0xf0, 0x51,
	0x04, 0x82, 0x00, 0x03, 0x03,
	0x04, 0x82, 0x00, 0x06, 0xb1,
	0x04, 0x82, 0x02, 0xbe, 0x18,
	0x04, 0x82, 0x02, 0xbf, 0x60,
	0x04, 0x82, 0x00, 0x58, 0x80,	// z: tx crc.

	// LinkB: MAX9295 - Serializer config
	0x04, 0x84, 0x03, 0x11, 0x40, 	// start z from B,20
	0x04, 0x84, 0x03, 0x08, 0x64, 	// z selected B,62
	0x04, 0x84, 0x00, 0x02, 0x43, 	// Video transmit z enable
	0x04, 0x84, 0x03, 0x18, 0x6c, 	// z dt1: 0x2c

	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x00, 0x03, 0x03,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xbe, 0x18,
	0x04, 0x84, 0x02, 0xbf, 0x60,
	0x04, 0x84, 0x00, 0x58, 0x80,	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0x62,  	// pipe0: A-Z, pipie1: B-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 enable.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 for Link B
	0x04, 0x90, 0x09, 0x6D, 0x15,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x6C,    // vc = 1
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x40,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x41,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 2500Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x39,
	0x04, 0x90, 0x04, 0x18, 0x39,
	// 0x04, 0x90, 0x04, 0x1B, 0x39,
	// 0x04, 0x90, 0x04, 0x1E, 0x39,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t sensing_max96712_max9295_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x52, 0x00, 0x10, 0x12,   // Link A:6Gbps B:3Gbps
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF1,     // Link A
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF2,     // Link B
	0x00, 0x64,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF3,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkA: MAX9295 - Serializer config
	0x04, 0x82, 0x03, 0x11, 0x40, 	// start z from B,20
	0x04, 0x82, 0x03, 0x08, 0x64, 	// z selected B,62
	0x04, 0x82, 0x00, 0x02, 0x43, 	// Video transmit z enable
	0x04, 0x82, 0x03, 0x18, 0x6c, 	// z dt1: 0x2c

	0x04, 0x82, 0x03, 0xf0, 0x51,
	0x04, 0x82, 0x00, 0x03, 0x03,
	0x04, 0x82, 0x00, 0x06, 0xb1,
	0x04, 0x82, 0x02, 0xbe, 0x18,
	0x04, 0x82, 0x02, 0xbf, 0x60,
	0x04, 0x82, 0x00, 0x58, 0x80,	// z: tx crc.

	// LinkB: MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	0x04, 0x84, 0x03, 0x30, 0x00,   // Sensor 1 set pipe Z
	0x04, 0x84, 0x03, 0x31, 0x33,   // 4 Lanes
	0x04, 0x84, 0x03, 0x32, 0xE0,   // Lane mapping for PHY 1
	0x04, 0x84, 0x03, 0x33, 0x04,   // Lane mapping for PHY 2
	0x04, 0x84, 0x03, 0x08, 0x64,   // Enable PORT B && pipe Z
	0x04, 0x84, 0x03, 0x11, 0x40,   // stat pipe Z for PORT B
	0x04, 0x84, 0x00, 0x02, 0x43,   // transmit enable for pipe Z
	0x04, 0x84, 0x03, 0x18, 0x6C,   // Datatype for pipe Z
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x05, 0x70, 0x1c,
	0x04, 0x84, 0x05, 0x70, 0x0c,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x58, 0x80, 	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0x62,  	// pipe0: A-Z, pipie1: B-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 enable.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 for Link B
	0x04, 0x90, 0x09, 0x6D, 0x15,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x6C,    // vc = 1
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x40,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x41,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 2500Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x39,
	0x04, 0x90, 0x04, 0x18, 0x39,
	// 0x04, 0x90, 0x04, 0x1B, 0x39,
	// 0x04, 0x90, 0x04, 0x1E, 0x39,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t weisen_max96712_max9295_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x10, 0x12,   // Link A:6Gbps B:3Gbps
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF1,     // Link A
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x32,
	0x04, 0x82, 0x00, 0x45, 0x30,

	0x04, 0x90, 0x00, 0x06, 0xF2,     // Link B
	0x00, 0x64,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF3,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkA: MAX9295 - Serializer config
	0x04, 0x82, 0x00, 0x10, 0x15,
	0x04, 0x82, 0x00, 0x12, 0x14,
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x82, 0x00, 0x58, 0x80,

	// LinkB: MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	0x04, 0x84, 0x03, 0x30, 0x00,   // Sensor 1 set pipe Z
	0x04, 0x84, 0x03, 0x31, 0x33,   // 4 Lanes
	0x04, 0x84, 0x03, 0x32, 0xE0,   // Lane mapping for PHY 1
	0x04, 0x84, 0x03, 0x33, 0x04,   // Lane mapping for PHY 2
	0x04, 0x84, 0x03, 0x08, 0x64,   // Enable PORT B && pipe Z
	0x04, 0x84, 0x03, 0x11, 0x40,   // stat pipe Z for PORT B
	0x04, 0x84, 0x00, 0x02, 0x43,   // transmit enable for pipe Z
	0x04, 0x84, 0x03, 0x18, 0x6C,   // Datatype for pipe Z
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x05, 0x70, 0x1c,
	0x04, 0x84, 0x05, 0x70, 0x0c,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x58, 0x80, 	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0x62,  	// pipe0: A-Z, pipie1: B-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 enable.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 for Link B
	0x04, 0x90, 0x09, 0x6D, 0x15,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x6C,    // vc = 1
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x40,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x41,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 2500Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x39,
	0x04, 0x90, 0x04, 0x18, 0x39,
	// 0x04, 0x90, 0x04, 0x1B, 0x39,
	// 0x04, 0x90, 0x04, 0x1E, 0x39,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t galaxy_with_max96712_max9295_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x11, 0x21,   // Link D:6Gbps C:3Gbps
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF8,     // Link D
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF4,     // Link C
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x6C,

	0x04, 0x90, 0x00, 0x06, 0xFC,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkD: MAX9295 - Serializer config
	0x04, 0x82, 0x00, 0x10, 0x15,
	0x04, 0x82, 0x00, 0x12, 0x14,
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x82, 0x00, 0x58, 0x80,

	// LinkC: MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	0x04, 0x84, 0x03, 0x30, 0x00,   // Sensor 1 set pipe Z
	0x04, 0x84, 0x03, 0x31, 0x33,   // 4 Lanes
	0x04, 0x84, 0x03, 0x32, 0xE0,   // Lane mapping for PHY 1
	0x04, 0x84, 0x03, 0x33, 0x04,   // Lane mapping for PHY 2
	0x04, 0x84, 0x03, 0x08, 0x64,   // Enable PORT B && pipe Z
	0x04, 0x84, 0x03, 0x11, 0x40,   // stat pipe Z for PORT B
	0x04, 0x84, 0x00, 0x02, 0x43,   // transmit enable for pipe Z
	0x04, 0x84, 0x03, 0x18, 0x6C,   // Datatype for pipe Z
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x05, 0x70, 0x1c,
	0x04, 0x84, 0x05, 0x70, 0x0c,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x58, 0x80, 	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0xAE,  	// pipe0: D-Z, pipie1: C-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 pipe0: CSI-A:VC0.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 pipi1: CSI-A: VC1.
	0x04, 0x90, 0x09, 0x6D, 0x15,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x6C,    // vc = 1
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x40,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x41,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 2000Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x34,
	0x04, 0x90, 0x04, 0x18, 0x34,
	0x04, 0x90, 0x04, 0x1B, 0x34,
	// 0x04, 0x90, 0x04, 0x1E, 0x34,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t galaxy_with_max96712_max9295_max96717_init2_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x90, 0x00, 0x11, 0x21,   // Link D:6Gbps C:3Gbps
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF8,     // Link D
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF4,     // Link C
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xFC,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkD: MAX9295 - Serializer config
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x82, 0x00, 0x58, 0x80,

	// LinkC: MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	0x04, 0x84, 0x03, 0x30, 0x00,   // Sensor 1 set pipe Z
	0x04, 0x84, 0x03, 0x31, 0x33,   // 4 Lanes
	0x04, 0x84, 0x03, 0x32, 0xE0,   // Lane mapping for PHY 1
	0x04, 0x84, 0x03, 0x33, 0x04,   // Lane mapping for PHY 2
	0x04, 0x84, 0x03, 0x08, 0x64,   // Enable PORT B && pipe Z
	0x04, 0x84, 0x03, 0x11, 0x40,   // stat pipe Z for PORT B
	0x04, 0x84, 0x00, 0x02, 0x43,   // transmit enable for pipe Z
	0x04, 0x84, 0x03, 0x18, 0x6C,   // Datatype for pipe Z
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x05, 0x70, 0x1c,
	0x04, 0x84, 0x05, 0x70, 0x0c,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x58, 0x80, 	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0xAE,  	// pipe0: D-Z, pipie1: C-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 pipe0: CSI-A:VC0.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 pipi1: CSI-A: VC1.
	0x04, 0x90, 0x09, 0x6D, 0x15,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x6C,    // vc = 1
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x40,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x41,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0+1
	0x04, 0x90, 0x08, 0xA2, 0x34,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 2000Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x34,
	0x04, 0x90, 0x04, 0x18, 0x34,
	0x04, 0x90, 0x04, 0x1B, 0x34,
	// 0x04, 0x90, 0x04, 0x1E, 0x34,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t galaxy_sepa_max96712_max9295_max96717_init_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x52, 0x00, 0x11, 0x21,   // Link D:6Gbps C:3Gbps
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x14, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability
	0x04, 0x90, 0x15, 0x49, 0x75,
	0x04, 0x90, 0x16, 0x49, 0x75,
	0x04, 0x90, 0x17, 0x49, 0x75,

	0x04, 0x90, 0x00, 0x06, 0xF8,     // Link D
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF4,     // Link C
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x6C,

	0x04, 0x90, 0x00, 0x06, 0xFC,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkD: MAX9295 - Serializer config
	0x04, 0x82, 0x00, 0x10, 0x15,
	0x04, 0x82, 0x00, 0x12, 0x14,
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x82, 0x00, 0x58, 0x80,

	// LinkC: MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	0x04, 0x84, 0x03, 0x30, 0x00,   // Sensor 1 set pipe Z
	0x04, 0x84, 0x03, 0x31, 0x33,   // 4 Lanes
	0x04, 0x84, 0x03, 0x32, 0xE0,   // Lane mapping for PHY 1
	0x04, 0x84, 0x03, 0x33, 0x04,   // Lane mapping for PHY 2
	0x04, 0x84, 0x03, 0x08, 0x64,   // Enable PORT B && pipe Z
	0x04, 0x84, 0x03, 0x11, 0x40,   // stat pipe Z for PORT B
	0x04, 0x84, 0x00, 0x02, 0x43,   // transmit enable for pipe Z
	0x04, 0x84, 0x03, 0x18, 0x6C,   // Datatype for pipe Z
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x05, 0x70, 0x1c,
	0x04, 0x84, 0x05, 0x70, 0x0c,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x58, 0x80, 	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0xAE,  	// pipe0: D-Z, pipie1: C-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 pipe0: CSI-A: VC0.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 pipe1: CSI-B: VC0.
	0x04, 0x90, 0x09, 0x6D, 0x2A,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x2C,    // vc = 0
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x00,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x01,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0~3
	0x04, 0x90, 0x08, 0xA2, 0xF4,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 1200Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x2C,
	0x04, 0x90, 0x04, 0x18, 0x2C,
	0x04, 0x90, 0x04, 0x1B, 0x2C,
	// 0x04, 0x90, 0x04, 0x1E, 0x2C,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t galaxy_sepa_max96712_max9295_max96717_init2_setting[] = {
	// reset 0820
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x13, 0x40, 	// reset all.
	0x00, 0xff,
	0x00, 0xff,
	0x04, 0x52, 0x00, 0x11, 0x21,   // Link D:6Gbps C:3Gbps
	0x04, 0x90, 0x00, 0x18, 0x0F, 	// One-shot link reset for all
	0x00, 0xff,
	0x00, 0xff,

	0x04, 0x90, 0x17, 0x49, 0x75,  // Enable ErrChPwrUp, Enhance link stability

	0x04, 0x90, 0x00, 0x06, 0xF8,     // Link D
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x82,
	0x04, 0x82, 0x00, 0x42, 0xC4,
	0x04, 0x82, 0x00, 0x43, 0x82,
	0x04, 0x82, 0x00, 0x44, 0x22,
	0x04, 0x82, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xF4,     // Link C
	0x00, 0x32,
	0x04, 0x80, 0x00, 0x00, 0x84,
	0x04, 0x84, 0x00, 0x42, 0xC4,
	0x04, 0x84, 0x00, 0x43, 0x84,
	0x04, 0x84, 0x00, 0x44, 0x24,
	0x04, 0x84, 0x00, 0x45, 0x20,

	0x04, 0x90, 0x00, 0x06, 0xFC,   // Enable 2 Links in GMSL2 mode
	0x00, 0xFF,

	// LinkD: MAX9295 - Serializer config
	0x04, 0x82, 0x03, 0x11, 0x40,	 // start x/y/z/u from B,40
	0x04, 0x82, 0x03, 0x08, 0x64,	 // x/y/z/u selected B,64
	0x04, 0x82, 0x00, 0x02, 0x43,	 // Video transmit enable  //transmit Z,43

	0x04, 0x82, 0x03, 0x18, 0x6c,

	0x04, 0x82, 0x02, 0xD6, 0x80,
	0x00, 0x20,
	0x04, 0x82, 0x02, 0xD6, 0x9C,
	0x00, 0x20,
	0x04, 0x82, 0x00, 0x58, 0x80,

	// LinkC: MAX96717 - Serializer config
	0x04, 0x84, 0x02, 0xd3, 0x00,
	0x04, 0x84, 0x02, 0xbe, 0x90,
	0x04, 0x84, 0x02, 0xbf, 0x60,

	0x04, 0x84, 0x03, 0x30, 0x00,   // Sensor 1 set pipe Z
	0x04, 0x84, 0x03, 0x31, 0x33,   // 4 Lanes
	0x04, 0x84, 0x03, 0x32, 0xE0,   // Lane mapping for PHY 1
	0x04, 0x84, 0x03, 0x33, 0x04,   // Lane mapping for PHY 2
	0x04, 0x84, 0x03, 0x08, 0x64,   // Enable PORT B && pipe Z
	0x04, 0x84, 0x03, 0x11, 0x40,   // stat pipe Z for PORT B
	0x04, 0x84, 0x00, 0x02, 0x43,   // transmit enable for pipe Z
	0x04, 0x84, 0x03, 0x18, 0x6C,   // Datatype for pipe Z
	0x04, 0x84, 0x03, 0x83, 0x00,
	0x04, 0x84, 0x03, 0xf0, 0x51,
	0x04, 0x84, 0x03, 0xf1, 0x09,
	0x04, 0x84, 0x05, 0x70, 0x1c,
	0x04, 0x84, 0x05, 0x70, 0x0c,
	0x04, 0x84, 0x00, 0x06, 0xb1,
	0x04, 0x84, 0x02, 0xd3, 0x90,
	0x04, 0x84, 0x00, 0x58, 0x80, 	// z: tx crc.

	// MAX96712 - Deserializer config
	// Video Pipe Selection
	0x04, 0x90, 0x00, 0xF0, 0xAE,  	// pipe0: D-Z, pipie1: C-Z.
	// 0x04, 0x90, 0x00, 0xF1, 0xEA,  	// pipe2: C-Z, pipie3: D-Z.
	// 0x04, 0x90, 0x00, 0xF2, 0x40, 	// pipe4: A-X, pipie5: B-X.
	// 0x04, 0x90, 0x00, 0xF3, 0xC8, 	// pipe6: D-X, pipie7: D-X.
	0x04, 0x90, 0x00, 0xF4, 0x03,  	// Turn on pipe 0+1.
	0x04, 0x90, 0x00, 0x60, 0x44,  	// a/b-z: rx crc.

	// Video Pipe to MIPI Controller Mapping
	// RAW12, video pipe 0
	0x04, 0x90, 0x09, 0x0B, 0x07,  	// pipe0: s/d 0~2 pipe0: CSI-A: VC0.
	0x04, 0x90, 0x09, 0x2D, 0x15,  	// pipe0: s/d 0~2 map to MIPI Controller 1
	0x04, 0x90, 0x09, 0x0D, 0x2C,
	0x04, 0x90, 0x09, 0x0E, 0x2C,  	// pipe0: s/d 0 map data to VC0:RAW12
	0x04, 0x90, 0x09, 0x0F, 0x00,
	0x04, 0x90, 0x09, 0x10, 0x00,  	// pipe0: s/d 1 map FS to VC0
	0x04, 0x90, 0x09, 0x11, 0x01,
	0x04, 0x90, 0x09, 0x12, 0x01,  	// pipe0: s/d 2 map FS to VC0

	0x04, 0x90, 0x09, 0x4B, 0x07,    // Map source 0~2 pipe1: CSI-B: VC0.
	0x04, 0x90, 0x09, 0x6D, 0x2A,
	0x04, 0x90, 0x09, 0x4D, 0x2C,
	0x04, 0x90, 0x09, 0x4E, 0x2C,    // vc = 0
	0x04, 0x90, 0x09, 0x4F, 0x00,
	0x04, 0x90, 0x09, 0x50, 0x00,
	0x04, 0x90, 0x09, 0x51, 0x01,
	0x04, 0x90, 0x09, 0x52, 0x01,

	// MIPI PHY Setting
	// Set Des in 2x4 mode
	0x04, 0x90, 0x08, 0xA0, 0x04,
	// Set Lane Mapping for 4-lane port A
	0x04, 0x90, 0x08, 0xA3, 0xE4,
	0x04, 0x90, 0x08, 0xA4, 0xE4,
	// Set 4 lane D-PHY
	0x04, 0x90, 0x09, 0x0A, 0xC0,
	0x04, 0x90, 0x09, 0x4A, 0xC0,
	0x04, 0x90, 0x09, 0x8A, 0xC0,
	0x04, 0x90, 0x09, 0xCA, 0xC0,
	// Turn on MIPI PHYs 0~3
	0x04, 0x90, 0x08, 0xA2, 0xF4,

	// Hold DPLL in reset (config_soft_rst_n = 0) before changing the rate
	0x04, 0x90, 0x1C, 0x00, 0xF4,
	0x04, 0x90, 0x1D, 0x00, 0xF4,
	0x04, 0x90, 0x1E, 0x00, 0xF4,
	0x04, 0x90, 0x1F, 0x00, 0xF4,
	// Set Data rate to be 1200Mbps/lane
	// 0x04, 0x90, 0x04, 0x15, 0x2C,
	0x04, 0x90, 0x04, 0x18, 0x2C,
	0x04, 0x90, 0x04, 0x1B, 0x2C,
	// 0x04, 0x90, 0x04, 0x1E, 0x2C,
	// Release reset to DPLL (config_soft_rst_n = 1)
	0x04, 0x90, 0x1C, 0x00, 0xF5,
	0x04, 0x90, 0x1D, 0x00, 0xF5,
	0x04, 0x90, 0x1E, 0x00, 0xF5,
	0x04, 0x90, 0x1F, 0x00, 0xF5,
	0x04, 0x90, 0x04, 0x0B, 0x62,  	// stream on
};

uint8_t galaxy_sepa_max96712_csia_reset[] = {
	0x04, 0x90, 0x08, 0xA2, 0xC4,
	0x04, 0x90, 0x08, 0xA2, 0xF4,
};

uint8_t galaxy_sepa_max96712_csib_reset[] = {
	0x04, 0x90, 0x08, 0xA2, 0x34,
	0x04, 0x90, 0x08, 0xA2, 0xF4,
};

uint8_t galaxy_maxser_sensor_i2cmap_setting[] = {
	0x04, 0xC4, 0x00, 0x44, 0x32,
	0x04, 0xC4, 0x00, 0x45, 0x30,
};

static uint8_t max96712_phy_portb_init_setting[] = {
	0x04, 0x52, 0x08, 0xA2, 0xC4,    // Enable MIPI PHY2~3
	0x04, 0x52, 0x09, 0x2D, 0x2A,    // Map pipe0 to controller 2
	0x04, 0x52, 0x09, 0x6D, 0x2A,    // Map pipe1 to controller 2
	0x04, 0x52, 0x09, 0xAD, 0x2A,    // Map pipe2 to controller 2
	0x04, 0x52, 0x09, 0xED, 0x2A,    // Map pipe3 to controller 2
};

static uint8_t max96712_phy_cpA2B_init_setting[] = {
	0x04, 0x52, 0x08, 0xA2, 0xF4,    // Enable MIPI PHY0~3
	0x04, 0x52, 0x08, 0xA9, 0xE8,    // Enable phy1 cp to phy3
};

static uint8_t max96712_phy_cpB2A_init_setting[] = {
	0x04, 0x52, 0x08, 0xA2, 0xF4,    // Enable MIPI PHY0~3
	0x04, 0x52, 0x08, 0xA9, 0xB8,    // Enable phy3 cp to phy1
};

static uint16_t max96712_trigger_setting_mfp[] = {
//MFP0
	0x0301, 0xa7,  // pulldown,push-pull,id = 7
	0x0302, 0x07,  // id = 7
	0x0300, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
	0x0337, 0xe7,  // linkB,High prio,Jitter,GMSL2 tx,id = 7
	0x0338, 0x07,  // linkB,disable GMSL2 rx, id = 7
	0x036D, 0xe7,  // linkC,High prio,Jitter,GMSL2 tx,id = 7
	0x036E, 0x07,  // linkC,disable GMSL2 rx, id = 7
	0x03A4, 0xe7,  // linkD,High prio,Jitter,GMSL2 tx,id = 7
	0x03A5, 0x07,  // linkD,disable GMSL2 rx, id = 7
//MFP1
	0x0304, 0xa7,  // pulldown,push-pull,id = 7
	0x0305, 0x07,  // id = 7
	0x0303, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
	0x033A, 0xe7,  // linkB,High prio,Jitter,GMSL2 tx,id = 7
	0x033B, 0x07,  // linkB,disable GMSL2 rx, id = 7
	0x0371, 0xe7,  // linkC,High prio,Jitter,GMSL2 tx,id = 7
	0x0372, 0x07,  // linkC,disable GMSL2 rx, id = 7
	0x03A7, 0xe7,  // linkD,High prio,Jitter,GMSL2 tx,id = 7
	0x03A8, 0x07,  // linkD,disable GMSL2 rx, id = 7
//MFP2
	0x0307, 0xa7,  // pulldown,push-pull,id = 7
	0x0308, 0x07,  // id = 7
	0x0306, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
	0x033D, 0xe7,  // linkB,High prio,Jitter,GMSL2 tx,id = 7
	0x033E, 0x07,  // linkB,disable GMSL2 rx, id = 7
	0x0374, 0xe7,  // linkC,High prio,Jitter,GMSL2 tx,id = 7
	0x0375, 0x07,  // linkC,disable GMSL2 rx, id = 7
	0x03AA, 0xe7,  // linkD,High prio,Jitter,GMSL2 tx,id = 7
	0x03AB, 0x07,  // linkD,disable GMSL2 rx, id = 7
//MFP3
	0x030A, 0xa7,  // pulldown,push-pull,id = 7
	0x030B, 0x07,  // id = 7
	0x0309, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
	0x0341, 0xe7,  // linkB,High prio,Jitter,GMSL2 tx,id = 7
	0x0342, 0x07,  // linkB,disable GMSL2 rx, id = 7
	0x0377, 0xe7,  // linkC,High prio,Jitter,GMSL2 tx,id = 7
	0x0378, 0x07,  // linkC,disable GMSL2 rx, id = 7
	0x03AD, 0xe7,  // linkD,High prio,Jitter,GMSL2 tx,id = 7
	0x03AE, 0x07,  // linkD,disable GMSL2 rx, id = 7
//MFP4
	0x030D, 0xa7,  // pulldown,push-pull,id = 7
	0x030E, 0x07,  // id = 7
	0x030C, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
	0x0344, 0xe7,  // linkB,High prio,Jitter,GMSL2 tx,id = 7
	0x0345, 0x07,  // linkB,disable GMSL2 rx, id = 7
	0x037A, 0xe7,  // linkC,High prio,Jitter,GMSL2 tx,id = 7
	0x037B, 0x07,  // linkC,disable GMSL2 rx, id = 7
	0x03B1, 0xe7,  // linkD,High prio,Jitter,GMSL2 tx,id = 7
	0x03B2, 0x07,  // linkD,disable GMSL2 rx, id = 7
};

static uint16_t max96712_trigger_setting_mfp14[] = {
   0x032d, 0xa7,  // pulldown,push-pull,id = 7
   0x032e, 0x07,  // id = 7
   0x032c, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
   0x0364, 0xe7,  // linkB,High prio,Jitter,GMSL2 tx,id = 7
   0x0365, 0x07,  // linkB,disable GMSL2 rx, id = 7
   0x039a, 0xe7,  // linkC,High prio,Jitter,GMSL2 tx,id = 7
   0x039b, 0x07,  // linkC,disable GMSL2 rx, id = 7
   0x03d1, 0xe7,  // linkD,High prio,Jitter,GMSL2 tx,id = 7
   0x03d2, 0x07,  // linkD,disable GMSL2 rx, id = 7
};

uint8_t ar0820_linear_30fps_init_setting[] = {
	// Sensor AR0820 config
	0x00, 0x20,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x59,
	0x00, 0x20,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x00, 0x20,
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0x07,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x31,
	0x05, 0x30, 0x25, 0x10, 0xa8, 0x24,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0xb2, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5c,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0xc8, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xf2,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x34,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xd1,
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2e,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3d,
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xbb,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xdb,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xdd,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x02, 0xda,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x01, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xf8,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xed,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3b,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3e,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x05, 0xcd,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x16, 0xee,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xbe,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0xc4,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0d,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xcb,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38,
	0x05, 0x30, 0x25, 0x10, 0xc2, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xca, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xd2, 0x30,
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xae,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6d,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2f,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90,
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x30, 0xa0,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x35, 0x08, 0xaa, 0x80,
	0x05, 0x30, 0x35, 0x0a, 0xc5, 0xc0,
	0x05, 0x30, 0x35, 0x0c, 0xc8, 0xc4,
	0x05, 0x30, 0x35, 0x0e, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x10, 0x8c, 0x88,
	0x05, 0x30, 0x35, 0x12, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x14, 0xa0, 0xa0,
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40,
	0x05, 0x30, 0x35, 0x1a, 0x86, 0x00,
	0x05, 0x30, 0x35, 0x1e, 0x0e, 0x40,
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4a,
	0x05, 0x30, 0x35, 0x20, 0x0e, 0x19,
	0x05, 0x30, 0x35, 0x22, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x24, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x26, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x28, 0x7f, 0x7f,
	0x05, 0x30, 0x30, 0xfe, 0x00, 0xa8,
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00,
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08,
	0x05, 0x30, 0x35, 0x4c, 0x00, 0x31,
	0x05, 0x30, 0x35, 0x4e, 0x53, 0x5c,
	0x05, 0x30, 0x35, 0x50, 0x5c, 0x7f,
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11,
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11,
	0x05, 0x30, 0x33, 0x7a, 0x0f, 0x50,
	0x05, 0x30, 0x33, 0x7e, 0xff, 0xf8,
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11,
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x3e, 0x4c, 0x04, 0x04,
	0x05, 0x30, 0x3e, 0x52, 0x00, 0x60,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x37, 0xa0, 0x00, 0x01,
	0x05, 0x30, 0x37, 0xa4, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xa8, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xac, 0x00, 0x00,
	0x05, 0x30, 0x3e, 0x94, 0x30, 0x14,
	0x05, 0x30, 0x33, 0x72, 0xf5, 0x0f,
	0x05, 0x30, 0x30, 0x2a, 0x00, 0x03,
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x01,
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x09,
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9c,
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01,
	0x05, 0x30, 0x30, 0x3a, 0x00, 0x85,
	0x05, 0x30, 0x30, 0x3c, 0x00, 0x03,
	0x05, 0x30, 0x31, 0xb0, 0x00, 0x47,
	0x05, 0x30, 0x31, 0xb2, 0x00, 0x26,
	0x05, 0x30, 0x31, 0xb4, 0x51, 0x87,
	0x05, 0x30, 0x31, 0xb6, 0x52, 0x48,
	0x05, 0x30, 0x31, 0xb8, 0x70, 0xca,
	0x05, 0x30, 0x31, 0xba, 0x02, 0x8a,
	0x05, 0x30, 0x31, 0xbc, 0x8a, 0x88,
	0x05, 0x30, 0x31, 0xbe, 0x00, 0x23,
	0x05, 0x30, 0x30, 0x02, 0x00, 0x04,
	0x05, 0x30, 0x30, 0x04, 0x00, 0x04,
	0x05, 0x30, 0x30, 0x06, 0x08, 0x73,
	0x05, 0x30, 0x30, 0x08, 0x0F, 0x03,
	0x05, 0x30, 0x32, 0xfc, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xe0, 0x84, 0x21,
	0x05, 0x30, 0x37, 0xe2, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3c, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3e, 0x84, 0x21,
	0x05, 0x30, 0x30, 0x40, 0xc0, 0x00,
	0x05, 0x30, 0x30, 0x10, 0xbe, 0xef,
	0x05, 0x30, 0x30, 0x40, 0xc0, 0x00,
	0x05, 0x30, 0x30, 0x82, 0x00, 0x00,
	0x05, 0x30, 0x30, 0xba, 0x11, 0x10,
	0x05, 0x30, 0x30, 0x12, 0x01, 0x6e,
	0x05, 0x30, 0x33, 0x62, 0x00, 0xff,
	0x05, 0x30, 0x33, 0x66, 0x00, 0x00,
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x0c, 0x11, 0x58,
	0x05, 0x30, 0x30, 0x0a, 0x09, 0x20,
	0x05, 0x30, 0x31, 0xae, 0x02, 0x04,
	0x05, 0x30, 0x31, 0xac, 0x0c, 0x0c,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x12, 0x00, 0x2e,
	0x05, 0x30, 0x33, 0x66, 0x00, 0x01,
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x01,
	0x05, 0x30, 0x33, 0x52, 0x00, 0x0e,
	//0x05, 0x30, 0x30, 0x70, 0x00, 0x02,	// TEST PATTERN
	0x04, 0xc4, 0x00, 0x02, 0xf3,		// Video transmit enable
	0x04, 0x90, 0x03, 0x25, 0xA5,		// ignore frist frame
	0x04, 0x90, 0x03, 0x13, 0x02,		// MIPI output enable
	0x00, 0x20,
};

uint8_t ar0820_dol2_15fps_init_setting[] = {
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x5D, 	// RESET_REGISTER
	0x00, 0xC8,
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x58, 	// RESET_REGISTER
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00, 	// SEQ_CTRL_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0x07, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB0, 0x31, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xA8, 0x24, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB2, 0xF9, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC0, 0x13, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC8, 0x06, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x90, 0xF2, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x90, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD0, 0x34, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xD1, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3D, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0xBB, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x14, 0xDB, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xDD, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0xF9, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x02, 0xDA, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD8, 0x0C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x01, 0xF0, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x14, 0xF0, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0xF8, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xED, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xE4, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC0, 0x0A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x05, 0xCD, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x16, 0xEE, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0xBE, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xE4, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0xC4, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD8, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0D, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0xCB, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC2, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xCA, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD2, 0x30, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0xAE, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB0, 0x41, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD0, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6D, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB0, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0xA0, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x35, 0x08, 0xAA, 0x80, 	// DAC_LD_8_9
	0x05, 0x30, 0x35, 0x0A, 0xC5, 0xC0, 	// DAC_LD_10_11
	0x05, 0x30, 0x35, 0x0C, 0xC8, 0xC4, 	// DAC_LD_12_13
	0x05, 0x30, 0x35, 0x0E, 0x8C, 0x8C, 	// DAC_LD_14_15
	0x05, 0x30, 0x35, 0x10, 0x8C, 0x88, 	// DAC_LD_16_17
	0x05, 0x30, 0x35, 0x12, 0x8C, 0x8C, 	// DAC_LD_18_19
	0x05, 0x30, 0x35, 0x14, 0xA0, 0xA0, 	// DAC_LD_20_21
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40, 	// DAC_LD_24_25
	0x05, 0x30, 0x35, 0x1A, 0x86, 0x00, 	// DAC_LD_26_27
	0x05, 0x30, 0x35, 0x1E, 0x0E, 0x40, 	// DAC_LD_30_31
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4A, 	// DAC_LD_6_7
	0x05, 0x30, 0x35, 0x20, 0x0E, 0x19, 	// DAC_LD_32_33
	0x05, 0x30, 0x35, 0x22, 0x7F, 0x7F, 	// DAC_LD_34_35
	0x05, 0x30, 0x35, 0x24, 0x7F, 0x7F, 	// DAC_LD_36_37
	0x05, 0x30, 0x35, 0x26, 0x7F, 0x7F, 	// DAC_LD_38_39
	0x05, 0x30, 0x35, 0x28, 0x7F, 0x7F, 	// DAC_LD_40_41
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00, 	// ROW_AB_CTRL
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08, 	// DAC_LD_64_65
	0x05, 0x30, 0x35, 0x4C, 0x00, 0x31, 	// DAC_LD_76_77
	0x05, 0x30, 0x35, 0x4E, 0x53, 0x5C, 	// DAC_LD_78_79
	0x05, 0x30, 0x35, 0x50, 0x5C, 0x7F, 	// DAC_LD_80_81
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11, 	// DAC_LD_82_83
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11, 	// DBLC_CONTROL
	0x05, 0x30, 0x33, 0x7A, 0x0F, 0x50, 	// DBLC_SCALE0
	0x05, 0x30, 0x33, 0x7E, 0xFF, 0xF8, 	// DBLC_OFFSET0
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11, 	// HDR_CONTROL0
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00, 	// DLO_CONTROL0
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73, 	// DCG_TRIM
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21, 	// DELTA_DK_CONTROL
	0x05, 0x30, 0x3E, 0x4C, 0x04, 0x04, 	// ROW_NOISE_DDK_FILTER_CONF
	0x05, 0x30, 0x3E, 0x52, 0x00, 0x60, 	// ROW_NOISE_DDK_KERNEL_SIZE
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21, 	// DELTA_DK_CONTROL
	0x05, 0x30, 0x37, 0xA0, 0x00, 0x01, 	// COARSE_INTEGRATION_AD_TIME
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME4
	0x05, 0x30, 0x3E, 0x94, 0x30, 0x15, 	// TEMPVSENS1_SREG_TRIM0
	0x05, 0x30, 0x3F, 0x92, 0x54, 0x00, 	// TEMPVSENS1_TMG_CTRL
	0x05, 0x30, 0x33, 0x72, 0xF5, 0x1F, 	// DBLC_FS0_CONTROL
	0x05, 0x30, 0x30, 0x2A, 0x00, 0x03, 	// VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x2C, 0x07, 0x01, 	// VT_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x2E, 0x00, 0x09, 	// PRE_PLL_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9C, 	// PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06, 	// OP_WORD_CLK_DIV
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01, 	// OP_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x3C, 0x00, 0x03, 	// PRE_PLL_CLK_DIV_ANA
	0x05, 0x30, 0x30, 0x3A, 0x00, 0x85, 	// PLL_MULTIPLIER_ANA
	0x05, 0x30, 0x31, 0xB0, 0x00, 0x4A, 	// FRAME_PREAMBLE
	0x05, 0x30, 0x31, 0xB2, 0x00, 0x27, 	// LINE_PREAMBLE
	0x05, 0x30, 0x31, 0xB4, 0x51, 0x87, 	// MIPI_TIMING_0
	0x05, 0x30, 0x31, 0xB6, 0x62, 0x88, 	// MIPI_TIMING_1
	0x05, 0x30, 0x31, 0xB8, 0x71, 0x0A, 	// MIPI_TIMING_2
	0x05, 0x30, 0x31, 0xBA, 0x03, 0x0A, 	// MIPI_TIMING_3
	0x05, 0x30, 0x31, 0xBC, 0x8A, 0x88, 	// MIPI_TIMING_4
	0x05, 0x30, 0x31, 0xBE, 0x00, 0x23, 	// MIPI_CONFIG_STATUS
	0x05, 0x30, 0x31, 0xC8, 0x0A, 0xBE, 	// MIPI_DESKEW_PAT_WIDTH
	0x05, 0x30, 0x31, 0xAE, 0x02, 0x04, 	// SERIAL_FORMAT
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x58, 	// RESET_REGISTER
	0x05, 0x30, 0x30, 0x04, 0x00, 0x04, 	// X_ADDR_START_
	0x05, 0x30, 0x30, 0x02, 0x00, 0x04, 	// Y_ADDR_START_
	0x05, 0x30, 0x30, 0x08, 0x0F, 0x03, 	// X_ADDR_END_
	0x05, 0x30, 0x30, 0x06, 0x08, 0x73, 	// Y_ADDR_END_
	0x05, 0x30, 0x30, 0x82, 0x00, 0x14, 	// OPERATION_MODE_CTRL
	0x05, 0x30, 0x30, 0xBA, 0x11, 0x11, 	// DIGITAL_CTRL
	0x05, 0x30, 0x32, 0x3C, 0x84, 0x21, 	// ROW_TX_ENABLE
	0x05, 0x30, 0x37, 0xE0, 0x84, 0x21, 	// ROW_TX_RO_ENABLE
	0x05, 0x30, 0x30, 0x40, 0x00, 0x00, 	// READ_MODE
	0x05, 0x30, 0x30, 0x44, 0x00, 0x00, 	// DARK_CONTROL
	0x05, 0x30, 0x31, 0x80, 0x00, 0x20, 	// DELTA_DK_CONTROL
	0x05, 0x30, 0x33, 0xE0, 0x01, 0x10, 	// TEST_ASIL_ROWS
	0x05, 0x30, 0x33, 0xEE, 0x00, 0x00, 	// TEST_CTRL
	0x05, 0x30, 0x32, 0xFC, 0x00, 0x00, 	// READ_MODE2
	0x05, 0x30, 0x34, 0x18, 0x00, 0x00, 	// LRE_GAIN_GRR_RED
	0x05, 0x30, 0x34, 0x1A, 0x00, 0x00, 	// LRE_GAIN_BLU_GRB
	0x05, 0x30, 0x31, 0xD0, 0x00, 0x01, 	// COMPANDING
	0x05, 0x30, 0x30, 0x32, 0x00, 0x00, 	// SCALING_MODE
	0x05, 0x30, 0x31, 0xAC, 0x0C, 0x0C, 	// DATA_FORMAT_BITS
	0x05, 0x30, 0x30, 0x0A, 0x09, 0x98, 	// FRAME_LENGTH_LINES_
	0x05, 0x30, 0x30, 0x0C, 0x10, 0xC8, 	// LINE_LENGTH_PCK_
	0x05, 0x30, 0x30, 0x12, 0x00, 0xDE, 	// COARSE_INTEGRATION_TIME_
	0x05, 0x30, 0x32, 0x12, 0x00, 0x0D, 	// COARSE_INTEGRATION_TIME2
	0x05, 0x30, 0x32, 0x16, 0x00, 0x01, 	// COARSE_INTEGRATION_TIME3
	0x05, 0x30, 0x32, 0x1A, 0x00, 0x00, 	// COARSE_INTEGRATION_TIME4
	0x05, 0x30, 0x32, 0x38, 0x82, 0x22, 	// EXPOSURE_RATIO
	0x05, 0x30, 0x32, 0xF6, 0x00, 0x01, 	// MIDDLE_INTEGRATION_CTRL
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME4
	0x05, 0x30, 0x3C, 0x06, 0x00, 0xA4, 	// CONFIGURE_BUFFERS1
	0x05, 0x30, 0x3C, 0x08, 0x01, 0x00, 	// CONFIGURE_BUFFERS2
	0x05, 0x30, 0x34, 0xDC, 0x00, 0x1B, 	// ASIL_EXT_CLK_COUNT_MSB_EXPECT
	0x05, 0x30, 0x34, 0xDE, 0xDD, 0x52, 	// ASIL_EXT_CLK_COUNT_LSB_EXPECT
	0x05, 0x30, 0x34, 0xE0, 0x00, 0x20, 	// ASIL_CLK_PIX_COUNT_MSB_EXPECT
	0x05, 0x30, 0x34, 0xE2, 0xFE, 0xC0, 	// ASIL_CLK_PIX_COUNT_LSB_EXPECT
	0x05, 0x30, 0x34, 0xE4, 0x00, 0x10, 	// ASIL_CLK_OP_COUNT_MSB_EXPECT
	0x05, 0x30, 0x34, 0xE6, 0x7F, 0x60, 	// ASIL_CLK_OP_COUNT_LSB_EXPECT
	0x05, 0x30, 0x34, 0xE8, 0x00, 0x10, 	// ASIL_CLK_REG_COUNT_MSB_EXPECT
	0x05, 0x30, 0x34, 0xEA, 0x7F, 0x60, 	// ASIL_CLK_REG_COUNT_LSB_EXPECT
	0x05, 0x30, 0x34, 0xEC, 0x02, 0x42, 	// ASIL_CLK_PIX_COUNT_100_EXT_EXPECT
	0x05, 0x30, 0x34, 0xEE, 0x01, 0x21, 	// ASIL_CLK_OP_COUNT_100_EXT_EXPECT
	0x05, 0x30, 0x34, 0xF0, 0x01, 0x21, 	// ASIL_CLK_REG_COUNT_100_EXT_EXPECT
	// 0x05, 0x30, 0x30, 0x1A, 0x00, 0x5C, 	// RESET_REGISTER

	0x04, 0xc4, 0x00, 0x02, 0xf3,  		// Video transmit enable
	0x04, 0x90, 0x03, 0x25, 0x80,  		// ignore frist frame
	0x04, 0x90, 0x03, 0x13, 0x02,  		// MIPI output enable
	0x00, 0x20,
};

uint8_t ar0820_hdr_2exp_30fps_init_setting[] = {
	// Sensor AR0820 config
	0x00, 0x20,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58, 	// RESET_REGISTER_LOCK_REG = 88
	0x00, 0x20,
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0x07,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x31,
	0x05, 0x30, 0x25, 0x10, 0xa8, 0x24,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0xb2, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5c,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0xc8, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xf2,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x34,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xd1,
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2e,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3d,
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xbb,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xdb,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xdd,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x02, 0xda,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x01, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xf8,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xed,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3b,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3e,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x05, 0xcd,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x16, 0xee,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xbe,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0xc4,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0d,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xcb,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38,
	0x05, 0x30, 0x25, 0x10, 0xc2, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xca, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xd2, 0x30,
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xae,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6d,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2f,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90,
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x30, 0xa0,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x35, 0x08, 0xaa, 0x80,
	0x05, 0x30, 0x35, 0x0a, 0xc5, 0xc0,
	0x05, 0x30, 0x35, 0x0c, 0xc8, 0xc4,
	0x05, 0x30, 0x35, 0x0e, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x10, 0x8c, 0x88,
	0x05, 0x30, 0x35, 0x12, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x14, 0xa0, 0xa0,
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40,
	0x05, 0x30, 0x35, 0x1a, 0x86, 0x00,
	0x05, 0x30, 0x35, 0x1e, 0x0e, 0x40,
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4a,
	0x05, 0x30, 0x35, 0x20, 0x0e, 0x19,
	0x05, 0x30, 0x35, 0x22, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x24, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x26, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x28, 0x7f, 0x7f,
	0x05, 0x30, 0x30, 0xfe, 0x00, 0xa8,
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00,
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08,
	0x05, 0x30, 0x35, 0x4c, 0x00, 0x31,
	0x05, 0x30, 0x35, 0x4e, 0x53, 0x5c,
	0x05, 0x30, 0x35, 0x50, 0x5c, 0x7f,
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11,
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11,
	0x05, 0x30, 0x33, 0x7a, 0x0f, 0x50,
	0x05, 0x30, 0x33, 0x7e, 0xff, 0xf8,
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11,
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x3e, 0x4c, 0x04, 0x04,
	0x05, 0x30, 0x3e, 0x52, 0x00, 0x60,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x37, 0xa0, 0x00, 0x01,
	0x05, 0x30, 0x37, 0xa4, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xa8, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xac, 0x00, 0x00,

	0x05, 0x30, 0x3e, 0x94, 0x30, 0x15,  	// TEMPVSENS1_SREG_TRIM0
	0x05, 0x30, 0x33, 0x72, 0xF5, 0x0F,  	// DBLC_FS0_CONTROL

	0x05, 0x30, 0x30, 0x2a, 0x00, 0x03,  	// VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x01,  	// VT_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x09,  	// PRE_PLL_CLK_DIV = 9
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9c,  	// PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,  	// OP_WORD_CLK_DIV
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01,  	// OP_SYS_CLK_DIV = 1
	0x05, 0x30, 0x30, 0x3a, 0x00, 0x85,  	// PLL_MULTIPLIER_ANA = 129
	0x05, 0x30, 0x30, 0x3c, 0x00, 0x03,  	// PRE_PLL_CLK_DIV_ANA = 3

	0x05, 0x30, 0x31, 0xb0, 0x00, 0x4a,  	// FRAME_PREAMBLE = 70
	0x05, 0x30, 0x31, 0xb2, 0x00, 0x27,  	// LINE_PREAMBLE = 37
	0x05, 0x30, 0x31, 0xb4, 0x51, 0x87,  	// MIPI_TIMING_0 = 20871
	0x05, 0x30, 0x31, 0xb6, 0x62, 0x88,  	// MIPI_TIMING_1 = 25159
	0x05, 0x30, 0x31, 0xb8, 0x71, 0x0a,  	// MIPI_TIMING_2 = 24777
	0x05, 0x30, 0x31, 0xba, 0x03, 0x0a,  	// MIPI_TIMING_3 = 778
	0x05, 0x30, 0x31, 0xbc, 0x8a, 0x88,  	// MIPI_TIMING_4 = 35336
	0x05, 0x30, 0x31, 0xbe, 0x00, 0x23,  	// MIPI_CONFIG_STATUS = 35
	0x05, 0x30, 0x31, 0xc8, 0x0a, 0xbe,  	// MIPI_DESKEW_PAT_WIDTH = 2748
	0x05, 0x30, 0x31, 0xae, 0x02, 0x04,  	// SERIAL_FORMAT = 516

	0x05, 0x30, 0x30, 0x04, 0x00, 0x04,  	// X_ADDR_START = 0
	0x05, 0x30, 0x30, 0x02, 0x00, 0x04,  	// Y_ADDR_START = 0
	0x05, 0x30, 0x30, 0x08, 0x0F, 0x03,  	// X_ADDR_END = 3847
	0x05, 0x30, 0x30, 0x06, 0x08, 0x73,  	// Y_ADDR_END = 2167

	0x05, 0x30, 0x30, 0x82, 0x00, 0x04,  	// OPERATION_MODE = 4
	0x05, 0x30, 0x30, 0xba, 0x11, 0x01,  	// DIGITAL_CTRL = 4353
	0x05, 0x30, 0x32, 0x3c, 0x84, 0x21,  	// ROW_TX_ENABLE = 33825
	0x05, 0x30, 0x37, 0xe0, 0x84, 0x21,  	// ROW_TX_RO_ENABLE = 33825
	0x05, 0x30, 0x30, 0x40, 0xC0, 0x01,  	// READ_MODE = 0
	0x05, 0x30, 0x30, 0x44, 0x00, 0x00,  	// DARK_CONTROL = 0
	0x05, 0x30, 0x31, 0x80, 0x00, 0x20,  	// DELTA_DK_CONTROL = 32
	0x05, 0x30, 0x33, 0xe0, 0x01, 0x10,  	// TEST_ASIL_ROWS = 272
	0x05, 0x30, 0x33, 0xee, 0x00, 0x00,  	// TEST_CTRL = 0
	0x05, 0x30, 0x32, 0xfc, 0x00, 0x00,  	// READ_MODE2 = 0
	0x05, 0x30, 0x34, 0x18, 0x00, 0x00,  	// LRE_GAIN_GRR_RED = 0
	0x05, 0x30, 0x34, 0x1a, 0x00, 0x00,  	// LRE_GAIN_BLU_GRB = 0
	0x05, 0x30, 0x31, 0xd0, 0x00, 0x01,  	// COMPANDING = 1
	0x05, 0x30, 0x30, 0x32, 0x00, 0x00,  	// SCALING_MODE = 0
	0x05, 0x30, 0x31, 0xac, 0x10, 0x0C,  	// DATA_FORMAT_BITS

	0x05, 0x30, 0x30, 0x0c, 0x08, 0x20,  	// LINE_LENGTH_PCK = 2080
	0x05, 0x30, 0x30, 0x0a, 0x09, 0x20,  	// FRAME_LENGTH_LINE = 2336

	0x05, 0x30, 0x30, 0x12, 0x00, 0x28,  	// COARSE_INTEGRATION_TIME = 40
	0x05, 0x30, 0x32, 0x12, 0x00, 0x04,  	// COARSE_INTEGRATION_TIME2 = 1
	0x05, 0x30, 0x32, 0x16, 0x00, 0x01,  	// COARSE_INTEGRATION_TIME3 = 1
	0x05, 0x30, 0x32, 0x1a, 0x00, 0x00,  	// COARSE_INTEGRATION_TIME4 = 0
	0x05, 0x30, 0x32, 0x38, 0x02, 0x12,  	// EXPOSURE_RATIO = 33314
	0x05, 0x30, 0x32, 0xf6, 0x00, 0x01,  	// MIDDLE_INTEGRATION_CTRL = 1
	0x05, 0x30, 0x37, 0xa4, 0x00, 0x00,  	// COARSE_INTEGRATION_AD_TIME2 = 0
	0x05, 0x30, 0x37, 0xa8, 0x00, 0x00,  	// COARSE_INTEGRATION_AD_TIME3 = 0
	0x05, 0x30, 0x37, 0xac, 0x00, 0x00,  	// COARSE_INTEGRATION_AD_TIME4 = 0

	0x05, 0x30, 0x3c, 0x06, 0x00, 0xa4,  	// CONFIGURE_BUFFERS1 = 164
	0x05, 0x30, 0x3c, 0x08, 0x01, 0x00,  	// CONFIGURE_BUFFERS2 = 256
	0x05, 0x30, 0x33, 0x62, 0x00, 0xff,  	// DC_GAIN
	0x05, 0x30, 0x33, 0x66, 0x00, 0x00,  	// ANALOG_GAIN
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x00,  	// ANALOG_GAIN2

	0x05, 0x30, 0x34, 0xdc, 0x00, 0x0c,  	// ASIL_EXT_CLK_COUNT_MSB_EXPECT = 13
	0x05, 0x30, 0x34, 0xde, 0xD5, 0x00,  	// ASIL_EXT_CLK_COUNT_LSB_EXPECT = 22630
	0x05, 0x30, 0x34, 0xe0, 0x00, 0x0a,  	// ASIL_CLK_PIX_COUNT_MSB_EXPECT = 10
	0x05, 0x30, 0x34, 0xe2, 0x24, 0x00,  	// ASIL_CLK_PIX_COUNT_LSB_EXPECT = 9216
	0x05, 0x30, 0x34, 0xe4, 0x00, 0x25,  	// ASIL_CLK_OP_COUNT_MSB_EXPECT = 37
	0x05, 0x30, 0x34, 0xe6, 0x12, 0x00,  	// ASIL_CLK_OP_COUNT_LSB_EXPECT = 4608
	0x05, 0x30, 0x34, 0xe8, 0x00, 0x25,  	// ASIL_CLK_REG_COUNT_MSB_EXPECT = 37
	0x05, 0x30, 0x34, 0xea, 0x12, 0x00,  	// ASIL_CLK_REG_COUNT_LSB_EXPECT = 4608
	0x05, 0x30, 0x34, 0xec, 0x02, 0x42,  	// ASIL_CLK_PIX_COUNT_100_EXT_EXPECT = 556
	0x05, 0x30, 0x34, 0xee, 0x01, 0x21,  	// ASIL_CLK_OP_COUNT_100_EXT_EXPECT = 278
	0x05, 0x30, 0x34, 0xf0, 0x01, 0x21,  	// ASIL_CLK_REG_COUNT_100_EXT_EXPECT = 278

	0x05, 0x30, 0x33, 0xC0, 0x20, 0x00,  	// OC_LUT_00
	0x05, 0x30, 0x33, 0xC2, 0x34, 0x50,  	// OC_LUT_01
	0x05, 0x30, 0x33, 0xC4, 0x48, 0xA0,  	// OC_LUT_02
	0x05, 0x30, 0x33, 0xC6, 0x5C, 0xF0,  	// OC_LUT_03
	0x05, 0x30, 0x33, 0xC8, 0x71, 0x40,  	// OC_LUT_04
	0x05, 0x30, 0x33, 0xCA, 0x85, 0x90,  	// OC_LUT_05
	0x05, 0x30, 0x33, 0xCC, 0x99, 0xE0,  	// OC_LUT_06
	0x05, 0x30, 0x33, 0xCE, 0xAE, 0x30,  	// OC_LUT_07
	0x05, 0x30, 0x33, 0xD0, 0xC2, 0x80,  	// OC_LUT_08
	0x05, 0x30, 0x33, 0xD2, 0xD6, 0xD0,  	// OC_LUT_09
	0x05, 0x30, 0x33, 0xD4, 0xEB, 0x20,  	// OC_LUT_10
	0x05, 0x30, 0x33, 0xD6, 0xFF, 0x70,  	// OC_LUT_11
	0x05, 0x30, 0x33, 0xD8, 0xFF, 0x70,  	// OC_LUT_12
	0x05, 0x30, 0x33, 0xDA, 0xFF, 0x70,  	// OC_LUT_13
	0x05, 0x30, 0x33, 0xDC, 0xFF, 0x70,  	// OC_LUT_14
	0x05, 0x30, 0x33, 0xDE, 0xFF, 0x70,  	// OC_LUT_15

	0x05, 0x30, 0x37, 0xA0, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00,  	// COARSE_INTEGRATION_AD_TIME4

	0x05, 0x30, 0x32, 0x80, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x82, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x84, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x86, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x88, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x8A, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x8C, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x8E, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x90, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x92, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x94, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x96, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x98, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x9A, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x9C, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x9E, 0x0F, 0xA0,  	// T1_BARRIER_C3

	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,  	// DLO_CONTROL0
	0x05, 0x30, 0x31, 0x02, 0x60, 0x64,  	// DLO_CONTROL1
	0x05, 0x30, 0x31, 0x04, 0x60, 0x64,  	// DLO_CONTROL2
	0x05, 0x30, 0x31, 0x06, 0x60, 0x64,  	// DLO_CONTROL3
	0x05, 0x30, 0x31, 0x08, 0x07, 0xD0,  	// DLO_CONTROL4
	0x05, 0x30, 0x30, 0x40, 0xC0, 0x01,  	// READ_MODE
	//0x05, 0x30, 0x30, 0x70, 0x00, 0x02,	//  TEST PATTERN
	0x04, 0xc4, 0x00, 0x02, 0xf3,		//  Video transmit enable
	0x04, 0x90, 0x03, 0x25, 0xA5,		//  ignore frist frame
	0x04, 0x90, 0x03, 0x13, 0x02,		//  MIPI output enable
	0x00, 0x20,
};

uint8_t ar0820_hdr_3exp_30fps_init_setting[] = {
	// Sensor AR0820 config
	0x05, 0x30, 0x30, 0x1a, 0x09, 0x5D,
	0x00, 0xC8,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0x07,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x31,
	0x05, 0x30, 0x25, 0x10, 0xa8, 0x24,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0xb2, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5c,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0xc8, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xf2,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x34,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xd1,
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2e,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3d,
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xbb,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xdb,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xdd,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x02, 0xda,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x01, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xf8,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xed,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3b,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3e,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x05, 0xcd,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x16, 0xee,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xbe,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0xc4,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0d,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xcb,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38,
	0x05, 0x30, 0x25, 0x10, 0xc2, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xca, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xd2, 0x30,
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xae,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6d,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2f,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90,
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x30, 0xa0,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x35, 0x08, 0xaa, 0x80,
	0x05, 0x30, 0x35, 0x0a, 0xc5, 0xc0,
	0x05, 0x30, 0x35, 0x0c, 0xc8, 0xc4,
	0x05, 0x30, 0x35, 0x0e, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x10, 0x8c, 0x88,
	0x05, 0x30, 0x35, 0x12, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x14, 0xa0, 0xa0,
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40,
	0x05, 0x30, 0x35, 0x1a, 0x86, 0x00,
	0x05, 0x30, 0x35, 0x1e, 0x0e, 0x40,
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4a,
	0x05, 0x30, 0x35, 0x20, 0x0e, 0x19,
	0x05, 0x30, 0x35, 0x22, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x24, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x26, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x28, 0x7f, 0x7f,
	0x05, 0x30, 0x30, 0xfe, 0x00, 0xa8,
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00,
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08,
	0x05, 0x30, 0x35, 0x4c, 0x00, 0x31,
	0x05, 0x30, 0x35, 0x4e, 0x53, 0x5c,
	0x05, 0x30, 0x35, 0x50, 0x5c, 0x7f,
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11,
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11,
	0x05, 0x30, 0x33, 0x7a, 0x0f, 0x50,
	0x05, 0x30, 0x33, 0x7e, 0xff, 0xf8,
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11,
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x3e, 0x4c, 0x04, 0x04,
	0x05, 0x30, 0x3e, 0x52, 0x00, 0x60,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x37, 0xa0, 0x00, 0x01,
	0x05, 0x30, 0x37, 0xa4, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xa8, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xac, 0x00, 0x00,
	0x05, 0x30, 0x3e, 0x94, 0x30, 0x15,  	// TEMPVSENS1_SREG_TRIM0
	0x05, 0x30, 0x3e, 0x9c, 0x00, 0x00,  	// TEMPVSENS0_MUX_ADDR_EN_HI
	0x05, 0x30, 0x3e, 0x9e, 0x00, 0x00,  	// TEMPVSENS0_MUX_ADDR_EN_LO
	0x05, 0x30, 0x3f, 0x92, 0x54, 0x00,  	// TEMPVSENS1_TMG_CTRL
	0x05, 0x30, 0x33, 0x72, 0xf5, 0x0f,  	// DBLC_FS0_CONTROL

	0x05, 0x30, 0x30, 0x2a, 0x00, 0x03,  	// VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x01,
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x09,  	// PRE_PLL_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9c,  	// PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01,
	0x05, 0x30, 0x30, 0x3a, 0x00, 0x85,
	0x05, 0x30, 0x30, 0x3c, 0x00, 0x03,
	0x05, 0x30, 0x31, 0xb0, 0x00, 0x47,
	0x05, 0x30, 0x31, 0xb2, 0x00, 0x26,
	0x05, 0x30, 0x31, 0xb4, 0x51, 0x87,
	0x05, 0x30, 0x31, 0xb6, 0x52, 0x48,
	0x05, 0x30, 0x31, 0xb8, 0x70, 0xca,
	0x05, 0x30, 0x31, 0xba, 0x02, 0x8a,
	0x05, 0x30, 0x31, 0xbc, 0x8a, 0x88,
	0x05, 0x30, 0x31, 0xbe, 0x00, 0x23,

	0x05, 0x30, 0x30, 0x04, 0x00, 0x04,  	// X_ADDR_START_
	0x05, 0x30, 0x30, 0x02, 0x00, 0x04,  	// Y_ADDR_START_
	0x05, 0x30, 0x30, 0x08, 0x0F, 0x03,  	// X_ADDR_END_
	0x05, 0x30, 0x30, 0x06, 0x08, 0x73,  	// Y_ADDR_END_

	0x05, 0x30, 0x32, 0xfc, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xe0, 0x84, 0x21,
	0x05, 0x30, 0x37, 0xe2, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3c, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3e, 0x84, 0x21,
	0x05, 0x30, 0x30, 0x40, 0x00, 0x00,  	// READ_MODE
	0x05, 0x30, 0x30, 0x1D, 0x00, 0x00,  	// IMAGE_ORIENTATION
	0x05, 0x30, 0x30, 0x82, 0x00, 0x08,  	// OPERATION_MODE_CTRL
	0x05, 0x30, 0x30, 0xba, 0x11, 0x12,  	// DIGITAL_CTRL
	0x05, 0x30, 0x30, 0x12, 0x00, 0x65,  	// COARSE_INTEGRATION_TIME_
	0x05, 0x30, 0x32, 0x12, 0x00, 0x09,  	// COARSE_INTEGRATION_TIME2
	0x05, 0x30, 0x32, 0x16, 0x00, 0x01,  	// COARSE_INTEGRATION_TIME3
	0x05, 0x30, 0x32, 0x38, 0x03, 0x34,  	// EXPOSURE_RATIO
	0x05, 0x30, 0x3c, 0x06, 0x1C, 0x88,  	// CONFIGURE_BUFFERS1
	0x05, 0x30, 0x3c, 0x08, 0x01, 0x00,  	// CONFIGURE_BUFFERS2
	0x05, 0x30, 0x31, 0xD0, 0x00, 0x01,  	// COMPANDING

	0x05, 0x30, 0x33, 0x62, 0x00, 0xff,
	0x05, 0x30, 0x33, 0x66, 0x00, 0x00,
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x00,

	0x05, 0x30, 0x32, 0xF6, 0x00, 0x01,  	// MIDDLE_INTEGRATION_CTRL
	0x05, 0x30, 0x30, 0x0c, 0x05, 0xc8,  	// LINE_LENGTH_PCK
	0x05, 0x30, 0x30, 0x0a, 0x09, 0x22,  	// FRAME_LENGTH_LINES_

	0x05, 0x30, 0x33, 0xC0, 0x20, 0x00,  	// OC_LUT_00
	0x05, 0x30, 0x33, 0xC2, 0x34, 0x50,  	// OC_LUT_01
	0x05, 0x30, 0x33, 0xC4, 0x48, 0xA0,  	// OC_LUT_02
	0x05, 0x30, 0x33, 0xC6, 0x5C, 0xF0,  	// OC_LUT_03
	0x05, 0x30, 0x33, 0xC8, 0x71, 0x40,  	// OC_LUT_04
	0x05, 0x30, 0x33, 0xCA, 0x85, 0x90,  	// OC_LUT_05
	0x05, 0x30, 0x33, 0xCC, 0x99, 0xE0,  	// OC_LUT_06
	0x05, 0x30, 0x33, 0xCE, 0xAE, 0x30,  	// OC_LUT_07
	0x05, 0x30, 0x33, 0xD0, 0xC2, 0x80,  	// OC_LUT_08
	0x05, 0x30, 0x33, 0xD2, 0xD6, 0xD0,  	// OC_LUT_09
	0x05, 0x30, 0x33, 0xD4, 0xEB, 0x20,  	// OC_LUT_10
	0x05, 0x30, 0x33, 0xD6, 0xFF, 0x70,  	// OC_LUT_11
	0x05, 0x30, 0x33, 0xD8, 0xFF, 0x70,  	// OC_LUT_12
	0x05, 0x30, 0x33, 0xDA, 0xFF, 0x70,  	// OC_LUT_13
	0x05, 0x30, 0x33, 0xDC, 0xFF, 0x70,  	// OC_LUT_14
	0x05, 0x30, 0x33, 0xDE, 0xFF, 0x70,  	// OC_LUT_15

	0x05, 0x30, 0x37, 0xA0, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00,  	// COARSE_INTEGRATION_AD_TIME4

	0x05, 0x30, 0x32, 0x80, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x82, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x84, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x86, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x88, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x8A, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x8C, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x8E, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x90, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x92, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x94, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x96, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x98, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x9A, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x9C, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x9E, 0x0F, 0xA0,  	// T1_BARRIER_C3

	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,  	// DLO_CONTROL0
	0x05, 0x30, 0x31, 0x02, 0x60, 0x64,  	// DLO_CONTROL1
	0x05, 0x30, 0x31, 0x04, 0x60, 0x64,  	// DLO_CONTROL2
	0x05, 0x30, 0x31, 0x06, 0x60, 0x64,  	// DLO_CONTROL3
	0x05, 0x30, 0x31, 0x08, 0x07, 0xD0,  	// DLO_CONTROL4

	0x05, 0x30, 0x31, 0xae, 0x02, 0x04,
	0x05, 0x30, 0x31, 0xac, 0x14, 0x0c,  	// DATA_FORMAT_BITS
	0x00, 0x64,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x5c,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x00, 0x64,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x05, 0x30, 0x30, 0x40, 0x00, 0x00,  	// READ_MODE
	0x05, 0x30, 0x3f, 0x80, 0x40, 0x00,  	// wait fv lv time
	// 0x05, 0x30, 0x30, 0x70, 0x00, 0x02,   	// TEST PATTERN
	0x04, 0xc4, 0x00, 0x02, 0xf3,  		// Video transmit enable
	0x04, 0x90, 0x03, 0x25, 0x80,  		// ignore frist frame
	0x04, 0x90, 0x03, 0x13, 0x02,  		// MIPI output enable
	0x00, 0x20,
};

uint8_t ar0820_hdr_3exp_galaxy_pwl_setting[] = {
	0x05, 0x30, 0x33, 0xC0, 0x20, 0x00,     // OC_LUT_00
	0x05, 0x30, 0x33, 0xC2, 0x40, 0x00,     // OC_LUT_01
	0x05, 0x30, 0x33, 0xC4, 0x60, 0x00,     // OC_LUT_02
	0x05, 0x30, 0x33, 0xC6, 0x80, 0x00,     // OC_LUT_03
	0x05, 0x30, 0x33, 0xC8, 0xA0, 0x00,     // OC_LUT_04
	0x05, 0x30, 0x33, 0xCA, 0xC0, 0x00,     // OC_LUT_05
	0x05, 0x30, 0x33, 0xCC, 0xE0, 0x00,     // OC_LUT_06
	0x05, 0x30, 0x33, 0xCE, 0xF0, 0x00,     // OC_LUT_07
	0x05, 0x30, 0x33, 0xD0, 0xF4, 0x00,     // OC_LUT_08
	0x05, 0x30, 0x33, 0xD2, 0xF8, 0x00,     // OC_LUT_09
	0x05, 0x30, 0x33, 0xD4, 0xFC, 0x00,     // OC_LUT_10
	0x05, 0x30, 0x33, 0xD6, 0xFF, 0xC0,     // OC_LUT_11
	0x05, 0x30, 0x33, 0xD8, 0xFF, 0xC0,     // OC_LUT_12
	0x05, 0x30, 0x33, 0xDA, 0xFF, 0xC0,     // OC_LUT_13
	0x05, 0x30, 0x33, 0xDC, 0xFF, 0xC0,     // OC_LUT_14
	0x05, 0x30, 0x33, 0xDE, 0xFF, 0xC0,     // OC_LUT_15
};

uint8_t ar0820_hdr_4exp_30fps_init_setting[] = {
	// Sensor AR0820 config
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x59, 	// RESET_REGISTER
	// 0x05, 0x30, 0x30, 0x1A, 0x00, 0x58, 	// RESET_REGISTER
	0x00, 0xC8,
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x58, 	// RESET_REGISTER
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00, 	// SEQ_CTRL_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0x07, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xFF, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB0, 0x31, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xA8, 0x24, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB2, 0xF9, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC0, 0x13, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC8, 0x06, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x90, 0xF2, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x90, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD0, 0x34, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xD1, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3D, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0xBB, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x14, 0xDB, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xDD, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0xF9, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x02, 0xDA, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD8, 0x0C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x01, 0xF0, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x14, 0xF0, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0xF8, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xED, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xE4, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC0, 0x0A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x05, 0xCD, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x16, 0xEE, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0xBE, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7B, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0xE4, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x20, 0xC4, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD8, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0C, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0D, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0xCB, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xC2, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xCA, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD2, 0x30, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x11, 0xAE, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB0, 0x41, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xD0, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6D, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0E, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0A, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2F, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0xB0, 0x00, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x30, 0xA0, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x25, 0x10, 0x7F, 0xFF, 	// SEQ_DATA_PORT
	0x05, 0x30, 0x35, 0x08, 0xAA, 0x80, 	// DAC_LD_8_9
	0x05, 0x30, 0x35, 0x0A, 0xC5, 0xC0, 	// DAC_LD_10_11
	0x05, 0x30, 0x35, 0x0C, 0xC8, 0xC4, 	// DAC_LD_12_13
	0x05, 0x30, 0x35, 0x0E, 0x8C, 0x8C, 	// DAC_LD_14_15
	0x05, 0x30, 0x35, 0x10, 0x8C, 0x88, 	// DAC_LD_16_17
	0x05, 0x30, 0x35, 0x12, 0x8C, 0x8C, 	// DAC_LD_18_19
	0x05, 0x30, 0x35, 0x14, 0xA0, 0xA0, 	// DAC_LD_20_21
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40, 	// DAC_LD_24_25
	0x05, 0x30, 0x35, 0x1A, 0x86, 0x00, 	// DAC_LD_26_27
	0x05, 0x30, 0x35, 0x1E, 0x0E, 0x40, 	// DAC_LD_30_31
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4A, 	// DAC_LD_6_7
	0x05, 0x30, 0x35, 0x20, 0x0E, 0x19, 	// DAC_LD_32_33
	0x05, 0x30, 0x35, 0x22, 0x7F, 0x7F, 	// DAC_LD_34_35
	0x05, 0x30, 0x35, 0x24, 0x7F, 0x7F, 	// DAC_LD_36_37
	0x05, 0x30, 0x35, 0x26, 0x7F, 0x7F, 	// DAC_LD_38_39
	0x05, 0x30, 0x35, 0x28, 0x7F, 0x7F, 	// DAC_LD_40_41
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00, 	// ROW_AB_CTRL
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08, 	// DAC_LD_64_65
	0x05, 0x30, 0x35, 0x4C, 0x00, 0x31, 	// DAC_LD_76_77
	0x05, 0x30, 0x35, 0x4E, 0x53, 0x5C, 	// DAC_LD_78_79
	0x05, 0x30, 0x35, 0x50, 0x5C, 0x7F, 	// DAC_LD_80_81
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11, 	// DAC_LD_82_83
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11, 	// DBLC_CONTROL
	0x05, 0x30, 0x33, 0x7A, 0x0F, 0x50, 	// DBLC_SCALE0
	0x05, 0x30, 0x33, 0x7E, 0xFF, 0xF8, 	// DBLC_OFFSET0
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11, 	// HDR_CONTROL0
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00, 	// DLO_CONTROL0
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73, 	// DCG_TRIM
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21, 	// DELTA_DK_CONTROL
	0x05, 0x30, 0x3E, 0x4C, 0x04, 0x04, 	// ROW_NOISE_DDK_FILTER_CONF
	0x05, 0x30, 0x3E, 0x52, 0x00, 0x60, 	// ROW_NOISE_DDK_KERNEL_SIZE
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21, 	// DELTA_DK_CONTROL
	0x05, 0x30, 0x37, 0xA0, 0x00, 0x01, 	// COARSE_INTEGRATION_AD_TIME
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME4
	0x05, 0x30, 0x3E, 0x94, 0x30, 0x15, 	// TEMPVSENS1_SREG_TRIM0
	0x05, 0x30, 0x3F, 0x92, 0x54, 0x00, 	// TEMPVSENS1_TMG_CTRL
	0x05, 0x30, 0x33, 0x72, 0xF5, 0x0F, 	// DBLC_FS0_CONTROL
	0x05, 0x30, 0x30, 0x2A, 0x00, 0x03, 	// VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x2C, 0x07, 0x01, 	// VT_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x2E, 0x00, 0x09, 	// PRE_PLL_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9C, 	// PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06, 	// OP_WORD_CLK_DIV
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01, 	// OP_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x3A, 0x00, 0x85, 	// PLL_MULTIPLIER_ANA
	0x05, 0x30, 0x30, 0x3C, 0x00, 0x03, 	// PRE_PLL_CLK_DIV_ANA
	0x05, 0x30, 0x31, 0xB0, 0x00, 0x47, 	// FRAME_PREAMBLE
	0x05, 0x30, 0x31, 0xB2, 0x00, 0x26, 	// LINE_PREAMBLE
	0x05, 0x30, 0x31, 0xB4, 0x51, 0x87, 	// MIPI_TIMING_0
	0x05, 0x30, 0x31, 0xB6, 0x52, 0x48, 	// MIPI_TIMING_1
	0x05, 0x30, 0x31, 0xB8, 0x70, 0xCA, 	// MIPI_TIMING_2
	0x05, 0x30, 0x31, 0xBA, 0x02, 0x8A, 	// MIPI_TIMING_3
	0x05, 0x30, 0x31, 0xBC, 0x8A, 0x88, 	// MIPI_TIMING_4
	0x05, 0x30, 0x31, 0xBE, 0x00, 0x23, 	// MIPI_CONFIG_STATUS
	0x05, 0x30, 0x30, 0x02, 0x00, 0x04, 	// Y_ADDR_START_
	0x05, 0x30, 0x30, 0x04, 0x00, 0x04, 	// X_ADDR_START_
	0x05, 0x30, 0x30, 0x06, 0x08, 0x73, 	// Y_ADDR_END_
	0x05, 0x30, 0x30, 0x08, 0x0F, 0x03, 	// X_ADDR_END_
	0x05, 0x30, 0x32, 0xFC, 0x00, 0x00, 	// READ_MODE2
	0x05, 0x30, 0x37, 0xE0, 0x84, 0x21, 	// ROW_TX_RO_ENABLE
	0x05, 0x30, 0x37, 0xE2, 0x84, 0x21, 	// ROW_TX_RO_ENABLE_CB
	0x05, 0x30, 0x32, 0x3C, 0x84, 0x21, 	// ROW_TX_ENABLE
	0x05, 0x30, 0x32, 0x3E, 0x84, 0x21, 	// ROW_TX_ENABLE_CB
	0x05, 0x30, 0x30, 0x40, 0x00, 0x01, 	// READ_MODE
	0x05, 0x30, 0x30, 0x1D, 0x00, 0x00,		// IMAGE_ORIENTATION_
	0x05, 0x30, 0x30, 0x82, 0x00, 0x0C, 	// OPERATION_MODE_CTRL
	0x05, 0x30, 0x30, 0xBA, 0x11, 0x13, 	// DIGITAL_CTRL
	0x05, 0x30, 0x30, 0x12, 0x00, 0x4C, 	// COARSE_INTEGRATION_TIME_
	0x05, 0x30, 0x30, 0x14, 0x00, 0x00, 	// FINE_INTEGRATION_TIME_
	0x05, 0x30, 0x32, 0x12, 0x00, 0x01, 	// COARSE_INTEGRATION_TIME2
	0x05, 0x30, 0x32, 0x16, 0x00, 0x01, 	// COARSE_INTEGRATION_TIME3
	0x05, 0x30, 0x32, 0x1A, 0x00, 0x00, 	// COARSE_INTEGRATION_TIME4
	0x05, 0x30, 0x32, 0x38, 0x02, 0x22, 	// EXPOSURE_RATIO
	0x05, 0x30, 0x32, 0xF6, 0x00, 0x01, 	// MIDDLE_INTEGRATION_CTRL
	0x05, 0x30, 0x3C, 0x06, 0x24, 0x6C, 	// CONFIGURE_BUFFERS1
	0x05, 0x30, 0x3C, 0x08, 0x01, 0x14, 	// CONFIGURE_BUFFERS2
	0x05, 0x30, 0x31, 0xD0, 0x00, 0x01, 	// COMPANDING
	0x05, 0x30, 0x33, 0x62, 0x00, 0xFF, 	// DC_GAIN
	0x05, 0x30, 0x33, 0x66, 0x00, 0x00, 	// ANALOG_GAIN
	0x05, 0x30, 0x33, 0x6A, 0x00, 0x00, 	// ANALOG_GAIN2
	0x05, 0x30, 0x30, 0x0C, 0x04, 0x50, 	// LINE_LENGTH_PCK_
	0x05, 0x30, 0x30, 0x0A, 0x09, 0x18, 	// FRAME_LENGTH_LINES_
	0x05, 0x30, 0x33, 0xC0, 0x20, 0x00, 	// OC_LUT_00
	0x05, 0x30, 0x33, 0xC2, 0x40, 0x00, 	// OC_LUT_01
	0x05, 0x30, 0x33, 0xC4, 0x60, 0x00, 	// OC_LUT_02
	0x05, 0x30, 0x33, 0xC6, 0x70, 0x00, 	// OC_LUT_03
	0x05, 0x30, 0x33, 0xC8, 0x80, 0x00, 	// OC_LUT_04
	0x05, 0x30, 0x33, 0xCA, 0x90, 0x00, 	// OC_LUT_05
	0x05, 0x30, 0x33, 0xCC, 0x98, 0x00, 	// OC_LUT_06
	0x05, 0x30, 0x33, 0xCE, 0xA0, 0x00, 	// OC_LUT_07
	0x05, 0x30, 0x33, 0xD0, 0xB0, 0x00, 	// OC_LUT_08
	0x05, 0x30, 0x33, 0xD2, 0xB8, 0x00, 	// OC_LUT_09
	0x05, 0x30, 0x33, 0xD4, 0xC0, 0x00, 	// OC_LUT_10
	0x05, 0x30, 0x33, 0xD6, 0xC8, 0x00, 	// OC_LUT_11
	0x05, 0x30, 0x33, 0xD8, 0xD0, 0x00, 	// OC_LUT_12
	0x05, 0x30, 0x33, 0xDA, 0xE0, 0x00, 	// OC_LUT_13
	0x05, 0x30, 0x33, 0xDC, 0xE8, 0x00, 	// OC_LUT_14
	0x05, 0x30, 0x33, 0xDE, 0xF0, 0x00, 	// OC_LUT_15
	0x05, 0x30, 0x37, 0xA0, 0x00, 0x01, 	// COARSE_INTEGRATION_AD_TIME
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00, 	// COARSE_INTEGRATION_AD_TIME4
	0x05, 0x30, 0x32, 0x80, 0x0F, 0xA0, 	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x82, 0x0F, 0xA0, 	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x84, 0x0F, 0xA0, 	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x86, 0x0F, 0xA0, 	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x88, 0x0F, 0xA0, 	// T2_BARRIER_C0
	0x05, 0x30, 0x32, 0x8A, 0x0F, 0xA0, 	// T2_BARRIER_C1
	0x05, 0x30, 0x32, 0x8C, 0x0F, 0xA0, 	// T2_BARRIER_C2
	0x05, 0x30, 0x32, 0x8E, 0x0F, 0xA0, 	// T2_BARRIER_C3
	0x05, 0x30, 0x32, 0x90, 0x0F, 0xA0, 	// T3_BARRIER_C0
	0x05, 0x30, 0x32, 0x92, 0x0F, 0xA0, 	// T3_BARRIER_C1
	0x05, 0x30, 0x32, 0x94, 0x0F, 0xA0, 	// T3_BARRIER_C2
	0x05, 0x30, 0x32, 0x96, 0x0F, 0xA0, 	// T3_BARRIER_C3
	0x05, 0x30, 0x32, 0x98, 0x0F, 0xA0, 	// T4_BARRIER_C0
	0x05, 0x30, 0x32, 0x9A, 0x0F, 0xA0, 	// T4_BARRIER_C1
	0x05, 0x30, 0x32, 0x9C, 0x0F, 0xA0, 	// T4_BARRIER_C2
	0x05, 0x30, 0x32, 0x9E, 0x0F, 0xA0, 	// T4_BARRIER_C3
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00, 	// DLO_CONTROL0
	0x05, 0x30, 0x31, 0x02, 0x60, 0x64, 	// DLO_CONTROL1
	0x05, 0x30, 0x31, 0x04, 0x60, 0x64, 	// DLO_CONTROL2
	0x05, 0x30, 0x31, 0x06, 0x60, 0x64, 	// DLO_CONTROL3
	0x05, 0x30, 0x31, 0x08, 0x07, 0xD0, 	// DLO_CONTROL4
	0x05, 0x30, 0x31, 0xAE, 0x02, 0x04, 	// SERIAL_FORMAT
	0x05, 0x30, 0x31, 0xAC, 0x18, 0x0C, 	// DATA_FORMAT_BITS
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x58, 	// RESET_REGISTER
	0x00, 0x64,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00, 	// SMIA_TEST
	0x05, 0x30, 0x30, 0x1A, 0x00, 0x58, 	// RESET_REGISTER

	0x04, 0xc4, 0x00, 0x02, 0xf3,  		// Video transmit enable
	0x04, 0x90, 0x03, 0x25, 0x80,  		// ignore frist frame
	0x04, 0x90, 0x03, 0x13, 0x02,  		// MIPI output enable
	0x00, 0x20,
};

uint8_t ar0820_awb_init_setting[] = {
	// awb rgain and bgian setting
	0x05, 0x30, 0x30, 0x58, 0x01, 0x00,
	0x05, 0x30, 0x35, 0xa2, 0x01, 0x00,
	0x05, 0x30, 0x35, 0xaa, 0x01, 0x00,
	0x05, 0x30, 0x30, 0x5a, 0x00, 0x8e,
	0x05, 0x30, 0x35, 0xa4, 0x00, 0x8e,
	0x05, 0x30, 0x35, 0xac, 0x00, 0x8e,
};
uint8_t ar0820_awb_extra_init_setting[] = {
	// awb rgain and bgian setting for zu3
	0x05, 0x30, 0x30, 0x58, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xa2, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xaa, 0x00, 0x80,
	0x05, 0x30, 0x30, 0x5a, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xa4, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xac, 0x00, 0x80,
	0x05, 0x30, 0x30, 0x56, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xa0, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xa8, 0x00, 0x80,
	0x05, 0x30, 0x30, 0x5c, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xa6, 0x00, 0x80,
	0x05, 0x30, 0x35, 0xae, 0x00, 0x80,
};
uint8_t ar0820_pll_multiplier[] = {
	0x05, 0x30, 0x30, 0x2a, 0x00, 0x04,     // VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x00, 0xe1,  	// PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x0c, 0x04, 0x38,     // LINE_LENGTH_PCK
	0x05, 0x30, 0x30, 0x0a, 0x0c, 0x8a,     // FRAME_LENGTH_LINES_
};
uint8_t ar0820_pll_multiplier_hvkeep[] = {
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x19,     // VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x01, 0xd4,     // PLL_MULTIPLIER
};
uint8_t ar0820_pll_multiplier_lowspeed[] = {
	0x05, 0x30, 0x30, 0x30, 0x00, 0xd0,     // PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x38, 0x00, 0x02,     // OP_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,     // OP_WORD_CLK_DIV
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x02,     // VT_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x2a, 0x00, 0x02,     // VT_PIX_CLK_DIV
};
uint8_t ar0820_pll_multiplier_lowspeed_ws[] = {
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x19,     // VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x02, 0x70,     // PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x38, 0x00, 0x02,     // OP_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,     // OP_WORD_CLK_DIV
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x02,     // VT_SYS_CLK_DIV
	0x05, 0x30, 0x30, 0x2a, 0x00, 0x02,     // VT_PIX_CLK_DIV
};
uint8_t ar0820_filp_mirror_disable[] = {
	0x05, 0x30, 0x30, 0x40, 0x00, 0x00,  	// READ_MODE
};
uint8_t ar0820_test_pattern[] = {
	0x05, 0x30, 0x30, 0x70, 0x00, 0x02,   	// TEST PATTERN
};

uint8_t ar0820_extra_max20087_init_setting[] = {
#ifndef POC_RETRY_POLICY
	0x03, 0x50, 0x01, 0x00,
	0x00, 0xff,
	0x03, 0x50, 0x01, 0x1f,
	0x00, 0xff,
#endif
	0x04, 0x90, 0x00, 0x10, 0xf1,
	0x00, 0xff,
};

uint8_t ar0820_extra_max9295_init_setting[] = {
	// MAX9295 - Serializer config
	0x04, 0xc4, 0x03, 0x30, 0x00,
	0x04, 0xc4, 0x03, 0x30, 0x00,
	0x04, 0xc4, 0x03, 0x32, 0xee,
	0x04, 0xc4, 0x03, 0x32, 0xee,
	0x04, 0xc4, 0x03, 0x33, 0xe4,
	0x04, 0xc4, 0x03, 0x33, 0xe4,
	0x04, 0xc4, 0x03, 0x31, 0x33,
	0x04, 0xc4, 0x03, 0x31, 0x33,
	0x04, 0xc4, 0x03, 0x11, 0xf0,
	0x04, 0xc4, 0x03, 0x11, 0xf0,
	0x04, 0xc4, 0x03, 0x08, 0x7f,
	0x04, 0xc4, 0x03, 0x08, 0x7f,
	0x04, 0xc4, 0x03, 0x14, 0xe2,
	0x04, 0xc4, 0x03, 0x14, 0xe2,
	0x04, 0xc4, 0x03, 0x16, 0x6c,
	0x04, 0xc4, 0x03, 0x16, 0x6c,
	0x04, 0xc4, 0x03, 0x18, 0x62,
	0x04, 0xc4, 0x03, 0x18, 0x62,
	0x04, 0xc4, 0x03, 0x1a, 0x62,
	0x04, 0xc4, 0x03, 0x1a, 0x62,
	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x03, 0xf0, 0x51,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x03, 0x03,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x00, 0x06, 0xb1,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbe, 0x18,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	0x04, 0xc4, 0x02, 0xbf, 0x60,
	// 0x04, 0xc4, 0x00, 0x54, 0x80, // TX_CRC: no.
	// 0x04, 0xc4, 0x00, 0x54, 0x80,
};

uint8_t ar0820_extra_max9295_stream_on_setting[] = {
	0x04, 0xc4, 0x00, 0x02, 0xf3,		// Video transmit enable.
	0x04, 0xc4, 0x00, 0x02, 0xf3,
};

uint8_t ar0820_extra_max9295_stream_off_setting[] = {
	0x04, 0xc4, 0x00, 0x02, 0x00,		// Video transmit disenable.
};

uint8_t ar0820_extra_max9296_init_setting[] = {
	// MAX9296 - Deserializer config
	0x04, 0x90, 0x03, 0x13, 0x00,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x30, 0x04,
	0x04, 0x90, 0x03, 0x35, 0x00,
	0x04, 0x90, 0x03, 0x35, 0x00,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x03, 0x19, 0x0C,
	0x04, 0x90, 0x04, 0x0a, 0x00,
	0x04, 0x90, 0x04, 0x0a, 0x00,
	// 0x04, 0x90, 0x04, 0x4a, 0xC0, // 4lane.
	// 0x04, 0x90, 0x04, 0x4a, 0xC0,
	0x04, 0x90, 0x04, 0x8a, 0x00,
	0x04, 0x90, 0x04, 0x8a, 0x00,
	0x04, 0x90, 0x04, 0xca, 0x00,
	0x04, 0x90, 0x04, 0xca, 0x00,
	0x04, 0x90, 0x03, 0x1d, 0x22, // PHY0: 200Mhz.
	0x04, 0x90, 0x03, 0x1d, 0x22,
	0x04, 0x90, 0x03, 0x20, 0x22, // PHY1: 200Mhz.
	0x04, 0x90, 0x03, 0x20, 0x22,
	0x04, 0x90, 0x03, 0x23, 0x22, // PHY2: 200Mhz.
	0x04, 0x90, 0x03, 0x23, 0x22,
	0x04, 0x90, 0x03, 0x26, 0x22, // PHY3: 200Mhz.
	0x04, 0x90, 0x03, 0x26, 0x22,
	0x04, 0x90, 0x00, 0x50, 0x00, // RX_CRC: no.
	0x04, 0x90, 0x00, 0x50, 0x00,
	0x04, 0x90, 0x00, 0x51, 0x01,
	0x04, 0x90, 0x00, 0x51, 0x01,
	0x04, 0x90, 0x00, 0x52, 0x02,
	0x04, 0x90, 0x00, 0x52, 0x02,
	0x04, 0x90, 0x00, 0x53, 0x03,
	0x04, 0x90, 0x00, 0x53, 0x03,
	0x04, 0x90, 0x03, 0x32, 0xf0, // all PHYs not standby.
	0x04, 0x90, 0x03, 0x32, 0xf0,
};

uint8_t ar0820_extra_max9296_stream_on_setting[] = {
	0x04, 0x90, 0x03, 0x25, 0xA5,  		// ignore frist frame.
	0x04, 0x90, 0x03, 0x13, 0x02,  		// MIPI output enable.
};

uint8_t ar0820_extra_max9296_stream_off_setting[] = {
	0x04, 0x90, 0x03, 0x13, 0x00,  		// MIPI output disable.
};

uint8_t ar0820_extra_linear_2160p_30fps_init_setting[] = {
	// Sensor AR0820 config
	0x00, 0x20,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x59,
	0x00, 0x32,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x00, 0x20,
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0x07,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x31,
	0x05, 0x30, 0x25, 0x10, 0xa8, 0x24,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0xb2, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5c,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0xc8, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xf2,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x34,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xd1,
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2e,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3d,
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xbb,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xdb,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xdd,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x02, 0xda,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x01, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xf8,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xed,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3b,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3e,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x05, 0xcd,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x16, 0xee,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xbe,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0xc4,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0d,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xcb,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38,
	0x05, 0x30, 0x25, 0x10, 0xc2, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xca, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xd2, 0x30,
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xae,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6d,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2f,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90,
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x30, 0xa0,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x35, 0x08, 0xaa, 0x80,
	0x05, 0x30, 0x35, 0x0a, 0xc5, 0xc0,
	0x05, 0x30, 0x35, 0x0c, 0xc8, 0xc4,
	0x05, 0x30, 0x35, 0x0e, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x10, 0x8c, 0x88,
	0x05, 0x30, 0x35, 0x12, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x14, 0xa0, 0xa0,
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40,
	0x05, 0x30, 0x35, 0x1a, 0x86, 0x00,
	0x05, 0x30, 0x35, 0x1e, 0x0e, 0x40,
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4a,
	0x05, 0x30, 0x35, 0x20, 0x0e, 0x19,
	0x05, 0x30, 0x35, 0x22, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x24, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x26, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x28, 0x7f, 0x7f,
	0x05, 0x30, 0x30, 0xfe, 0x00, 0xa8,
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00,
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08,
	0x05, 0x30, 0x35, 0x4c, 0x00, 0x31,
	0x05, 0x30, 0x35, 0x4e, 0x53, 0x5c,
	0x05, 0x30, 0x35, 0x50, 0x5c, 0x7f,
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11,
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11,
	0x05, 0x30, 0x33, 0x7a, 0x0f, 0x50,
	0x05, 0x30, 0x33, 0x7e, 0xff, 0xf8,
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11,
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x3e, 0x4c, 0x04, 0x04,
	0x05, 0x30, 0x3e, 0x52, 0x00, 0x60,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x37, 0xa0, 0x00, 0x01,
	0x05, 0x30, 0x37, 0xa4, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xa8, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xac, 0x00, 0x00,
	0x05, 0x30, 0x3e, 0x94, 0x30, 0x14,
	0x05, 0x30, 0x33, 0x72, 0xf5, 0x0f,
	0x05, 0x30, 0x30, 0x2a, 0x00, 0x03,
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x01,
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x09,
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9c,
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01,
	0x05, 0x30, 0x30, 0x3a, 0x00, 0x85,
	0x05, 0x30, 0x30, 0x3c, 0x00, 0x03,
	0x05, 0x30, 0x31, 0xb0, 0x00, 0x47,
	0x05, 0x30, 0x31, 0xb2, 0x00, 0x26,
	0x05, 0x30, 0x31, 0xb4, 0x51, 0x87,
	0x05, 0x30, 0x31, 0xb6, 0x52, 0x48,
	0x05, 0x30, 0x31, 0xb8, 0x70, 0xca,
	0x05, 0x30, 0x31, 0xba, 0x02, 0x8a,
	0x05, 0x30, 0x31, 0xbc, 0x8a, 0x88,
	0x05, 0x30, 0x31, 0xbe, 0x00, 0x23,
	0x05, 0x30, 0x30, 0x02, 0x00, 0x00, // Y-START: 0.
	0x05, 0x30, 0x30, 0x04, 0x00, 0x00,	// X-START: 0.
	0x05, 0x30, 0x30, 0x06, 0x08, 0x6F, // Y-END: 2159.
	0x05, 0x30, 0x30, 0x08, 0x0E, 0xFF, // X-END: 3839.
	0x05, 0x30, 0x32, 0xfc, 0x00, 0x00, // binning: no.
	0x05, 0x30, 0x37, 0xe0, 0x84, 0x21,
	0x05, 0x30, 0x37, 0xe2, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3c, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3e, 0x84, 0x21,
	0x05, 0x30, 0x30, 0x40, 0xc0, 0x00,
	0x05, 0x30, 0x30, 0x10, 0xbe, 0xef,
	0x05, 0x30, 0x30, 0x40, 0xc0, 0x00,
	0x05, 0x30, 0x30, 0x82, 0x00, 0x00,
	0x05, 0x30, 0x30, 0xba, 0x11, 0x10,
	0x05, 0x30, 0x30, 0x12, 0x01, 0x6e,
	0x05, 0x30, 0x33, 0x62, 0x00, 0xff,
	0x05, 0x30, 0x33, 0x66, 0x00, 0x00,
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x0c, 0x11, 0x58, // HTS: 4440.
	0x05, 0x30, 0x30, 0x0a, 0x09, 0x20, // VTS: 2336.
	0x05, 0x30, 0x31, 0xae, 0x02, 0x04,
	0x05, 0x30, 0x31, 0xac, 0x0c, 0x0c,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x12, 0x00, 0x2e,
	0x05, 0x30, 0x33, 0x66, 0x00, 0x01,
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x01,
	0x05, 0x30, 0x33, 0x52, 0x00, 0x0e,
	//0x05, 0x30, 0x30, 0x70, 0x00, 0x02,	// TEST PATTERN
	0x00, 0x20,
};

uint8_t ar0820_extra_pwl_2160p_30fps_init_setting[] = {
	// Sensor AR0820 config
	0x00, 0x20,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x5D,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x00, 0xC8,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x05, 0x30, 0x25, 0x12, 0x80, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0x07,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xff, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x01,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x10,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x20,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x08,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x31,
	0x05, 0x30, 0x25, 0x10, 0xa8, 0x24,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0xb2, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x78,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x5c,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6f,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x79,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0xc8, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x4b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x02,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xf2,
	0x05, 0x30, 0x25, 0x10, 0x90, 0xff,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x34,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x32,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xd1,
	0x05, 0x30, 0x25, 0x10, 0x09, 0x2e,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x33,
	0x05, 0x30, 0x25, 0x10, 0x12, 0x3d,
	0x05, 0x30, 0x25, 0x10, 0x04, 0x5b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xbb,
	0x05, 0x30, 0x25, 0x10, 0x13, 0x3a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x13,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x17,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x99,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xdb,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xdd,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xf9,
	0x05, 0x30, 0x25, 0x10, 0x02, 0xda,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x06,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x01, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x14, 0xf0,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xf8,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xed,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x3b,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x28,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x3e,
	0x05, 0x30, 0x25, 0x10, 0xc0, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x05, 0xcd,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x6e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x15,
	0x05, 0x30, 0x25, 0x10, 0x16, 0xee,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xbe,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x63,
	0x05, 0x30, 0x25, 0x10, 0x16, 0x71,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x95,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x19,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x88,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x84,
	0x05, 0x30, 0x25, 0x10, 0x20, 0x03,
	0x05, 0x30, 0x25, 0x10, 0x01, 0x8b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x0b,
	0x05, 0x30, 0x25, 0x10, 0x11, 0x7b,
	0x05, 0x30, 0x25, 0x10, 0x00, 0xe4,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x20, 0xc4,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x64,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x7a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x72,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd8, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x88, 0x1a,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0c,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0d,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x81,
	0x05, 0x30, 0x25, 0x10, 0x10, 0xcb,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x52,
	0x05, 0x30, 0x25, 0x10, 0x00, 0x38,
	0x05, 0x30, 0x25, 0x10, 0xc2, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xca, 0x00,
	0x05, 0x30, 0x25, 0x10, 0xd2, 0x30,
	0x05, 0x30, 0x25, 0x10, 0x82, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x11, 0xae,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x41,
	0x05, 0x30, 0x25, 0x10, 0xd0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x6d,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x1f,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0e,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x0a,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x42,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x86,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x2f,
	0x05, 0x30, 0x25, 0x10, 0x30, 0x90,
	0x05, 0x30, 0x25, 0x10, 0x90, 0x10,
	0x05, 0x30, 0x25, 0x10, 0xb0, 0x00,
	0x05, 0x30, 0x25, 0x10, 0x30, 0xa0,
	0x05, 0x30, 0x25, 0x10, 0x10, 0x16,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x25, 0x10, 0x7f, 0xff,
	0x05, 0x30, 0x35, 0x08, 0xaa, 0x80,
	0x05, 0x30, 0x35, 0x0a, 0xc5, 0xc0,
	0x05, 0x30, 0x35, 0x0c, 0xc8, 0xc4,
	0x05, 0x30, 0x35, 0x0e, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x10, 0x8c, 0x88,
	0x05, 0x30, 0x35, 0x12, 0x8c, 0x8c,
	0x05, 0x30, 0x35, 0x14, 0xa0, 0xa0,
	0x05, 0x30, 0x35, 0x18, 0x00, 0x40,
	0x05, 0x30, 0x35, 0x1a, 0x86, 0x00,
	0x05, 0x30, 0x35, 0x1e, 0x0e, 0x40,
	0x05, 0x30, 0x35, 0x06, 0x00, 0x4a,
	0x05, 0x30, 0x35, 0x20, 0x0e, 0x19,
	0x05, 0x30, 0x35, 0x22, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x24, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x26, 0x7f, 0x7f,
	0x05, 0x30, 0x35, 0x28, 0x7f, 0x7f,
	0x05, 0x30, 0x30, 0xfe, 0x00, 0xa8,
	0x05, 0x30, 0x35, 0x84, 0x00, 0x00,
	0x05, 0x30, 0x35, 0x40, 0x83, 0x08,
	0x05, 0x30, 0x35, 0x4c, 0x00, 0x31,
	0x05, 0x30, 0x35, 0x4e, 0x53, 0x5c,
	0x05, 0x30, 0x35, 0x50, 0x5c, 0x7f,
	0x05, 0x30, 0x35, 0x52, 0x00, 0x11,
	0x05, 0x30, 0x33, 0x70, 0x01, 0x11,
	0x05, 0x30, 0x33, 0x7a, 0x0f, 0x50,
	0x05, 0x30, 0x33, 0x7e, 0xff, 0xf8,
	0x05, 0x30, 0x31, 0x10, 0x00, 0x11,
	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,
	0x05, 0x30, 0x33, 0x64, 0x01, 0x73,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x3e, 0x4c, 0x04, 0x04,
	0x05, 0x30, 0x3e, 0x52, 0x00, 0x60,
	0x05, 0x30, 0x31, 0x80, 0x00, 0x21,
	0x05, 0x30, 0x37, 0xa0, 0x00, 0x01,
	0x05, 0x30, 0x37, 0xa4, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xa8, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xac, 0x00, 0x00,
	0x05, 0x30, 0x3e, 0x94, 0x30, 0x15,  	// TEMPVSENS1_SREG_TRIM0
	0x05, 0x30, 0x3e, 0x9c, 0x00, 0x00,  	// TEMPVSENS0_MUX_ADDR_EN_HI
	0x05, 0x30, 0x3e, 0x9e, 0x00, 0x00,  	// TEMPVSENS0_MUX_ADDR_EN_LO
	0x05, 0x30, 0x3f, 0x92, 0x54, 0x00,  	// TEMPVSENS1_TMG_CTRL
	0x05, 0x30, 0x33, 0x72, 0xf5, 0x0f,  	// DBLC_FS0_CONTROL

	0x05, 0x30, 0x30, 0x2a, 0x00, 0x03,  	// VT_PIX_CLK_DIV
	0x05, 0x30, 0x30, 0x2c, 0x07, 0x01,
	0x05, 0x30, 0x30, 0x2e, 0x00, 0x09,  	// PRE_PLL_CLK_DIV
	0x05, 0x30, 0x30, 0x30, 0x00, 0x9c,  	// PLL_MULTIPLIER
	0x05, 0x30, 0x30, 0x36, 0x00, 0x06,
	0x05, 0x30, 0x30, 0x38, 0x00, 0x01,
	0x05, 0x30, 0x30, 0x3a, 0x00, 0x85,
	0x05, 0x30, 0x30, 0x3c, 0x00, 0x03,
	0x05, 0x30, 0x31, 0xb0, 0x00, 0x47,
	0x05, 0x30, 0x31, 0xb2, 0x00, 0x26,
	0x05, 0x30, 0x31, 0xb4, 0x51, 0x87,
	0x05, 0x30, 0x31, 0xb6, 0x52, 0x48,
	0x05, 0x30, 0x31, 0xb8, 0x70, 0xca,
	0x05, 0x30, 0x31, 0xba, 0x02, 0x8a,
	0x05, 0x30, 0x31, 0xbc, 0x8a, 0x88,
	0x05, 0x30, 0x31, 0xbe, 0x00, 0x23,

	0x05, 0x30, 0x30, 0x04, 0x00, 0x00,  	// X_ADDR_START_
	0x05, 0x30, 0x30, 0x02, 0x00, 0x00,  	// Y_ADDR_START_
	0x05, 0x30, 0x30, 0x08, 0x0E, 0xFF,  	// X_ADDR_END_
	0x05, 0x30, 0x30, 0x06, 0x08, 0x6F,  	// Y_ADDR_END_

	0x05, 0x30, 0x32, 0xfc, 0x00, 0x00,
	0x05, 0x30, 0x37, 0xe0, 0x84, 0x21,
	0x05, 0x30, 0x37, 0xe2, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3c, 0x84, 0x21,
	0x05, 0x30, 0x32, 0x3e, 0x84, 0x21,
	0x05, 0x30, 0x30, 0x40, 0xc0, 0x01,  	// READ_MODE
	0x05, 0x30, 0x30, 0x1D, 0x00, 0x00,  	// IMAGE_ORIENTATION
	0x05, 0x30, 0x30, 0x82, 0x00, 0x08,  	// OPERATION_MODE_CTRL
	0x05, 0x30, 0x30, 0xba, 0x11, 0x12,  	// DIGITAL_CTRL
	0x05, 0x30, 0x30, 0x12, 0x00, 0x65,  	// COARSE_INTEGRATION_TIME_
	0x05, 0x30, 0x32, 0x12, 0x00, 0x09,  	// COARSE_INTEGRATION_TIME2
	0x05, 0x30, 0x32, 0x16, 0x00, 0x01,  	// COARSE_INTEGRATION_TIME3
	0x05, 0x30, 0x32, 0x38, 0x03, 0x34,  	// EXPOSURE_RATIO
	0x05, 0x30, 0x3c, 0x06, 0x1C, 0x88,  	// CONFIGURE_BUFFERS1
	0x05, 0x30, 0x3c, 0x08, 0x01, 0x00,  	// CONFIGURE_BUFFERS2
	0x05, 0x30, 0x31, 0xD0, 0x00, 0x01,  	// COMPANDING

	0x05, 0x30, 0x33, 0x62, 0x00, 0xff,
	0x05, 0x30, 0x33, 0x66, 0x00, 0x00,
	0x05, 0x30, 0x33, 0x6a, 0x00, 0x00,

	0x05, 0x30, 0x32, 0xF6, 0x00, 0x01,  	// MIDDLE_INTEGRATION_CTRL
	0x05, 0x30, 0x30, 0x0c, 0x05, 0xc8,  	// LINE_LENGTH_PCK
	0x05, 0x30, 0x30, 0x0a, 0x08, 0xF8,  	// FRAME_LENGTH_LINES_

	0x05, 0x30, 0x33, 0xC0, 0x20, 0x00,  	// OC_LUT_00
	0x05, 0x30, 0x33, 0xC2, 0x34, 0x50,  	// OC_LUT_01
	0x05, 0x30, 0x33, 0xC4, 0x48, 0xA0,  	// OC_LUT_02
	0x05, 0x30, 0x33, 0xC6, 0x5C, 0xF0,  	// OC_LUT_03
	0x05, 0x30, 0x33, 0xC8, 0x71, 0x40,  	// OC_LUT_04
	0x05, 0x30, 0x33, 0xCA, 0x85, 0x90,  	// OC_LUT_05
	0x05, 0x30, 0x33, 0xCC, 0x99, 0xE0,  	// OC_LUT_06
	0x05, 0x30, 0x33, 0xCE, 0xAE, 0x30,  	// OC_LUT_07
	0x05, 0x30, 0x33, 0xD0, 0xC2, 0x80,  	// OC_LUT_08
	0x05, 0x30, 0x33, 0xD2, 0xD6, 0xD0,  	// OC_LUT_09
	0x05, 0x30, 0x33, 0xD4, 0xEB, 0x20,  	// OC_LUT_10
	0x05, 0x30, 0x33, 0xD6, 0xFF, 0x70,  	// OC_LUT_11
	0x05, 0x30, 0x33, 0xD8, 0xFF, 0x70,  	// OC_LUT_12
	0x05, 0x30, 0x33, 0xDA, 0xFF, 0x70,  	// OC_LUT_13
	0x05, 0x30, 0x33, 0xDC, 0xFF, 0x70,  	// OC_LUT_14
	0x05, 0x30, 0x33, 0xDE, 0xFF, 0x70,  	// OC_LUT_15

	0x05, 0x30, 0x37, 0xA0, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME
	0x05, 0x30, 0x37, 0xA4, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME2
	0x05, 0x30, 0x37, 0xA8, 0x00, 0x01,  	// COARSE_INTEGRATION_AD_TIME3
	0x05, 0x30, 0x37, 0xAC, 0x00, 0x00,  	// COARSE_INTEGRATION_AD_TIME4

	0x05, 0x30, 0x32, 0x80, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x82, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x84, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x86, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x88, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x8A, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x8C, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x8E, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x90, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x92, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x94, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x96, 0x0F, 0xA0,  	// T1_BARRIER_C3
	0x05, 0x30, 0x32, 0x98, 0x0F, 0xA0,  	// T1_BARRIER_C0
	0x05, 0x30, 0x32, 0x9A, 0x0F, 0xA0,  	// T1_BARRIER_C1
	0x05, 0x30, 0x32, 0x9C, 0x0F, 0xA0,  	// T1_BARRIER_C2
	0x05, 0x30, 0x32, 0x9E, 0x0F, 0xA0,  	// T1_BARRIER_C3

	0x05, 0x30, 0x31, 0x00, 0x40, 0x00,  	// DLO_CONTROL0
	0x05, 0x30, 0x31, 0x02, 0x60, 0x64,  	// DLO_CONTROL1
	0x05, 0x30, 0x31, 0x04, 0x60, 0x64,  	// DLO_CONTROL2
	0x05, 0x30, 0x31, 0x06, 0x60, 0x64,  	// DLO_CONTROL3
	0x05, 0x30, 0x31, 0x08, 0x07, 0xD0,  	// DLO_CONTROL4

	0x05, 0x30, 0x31, 0xae, 0x02, 0x04,
	0x05, 0x30, 0x31, 0xac, 0x14, 0x0c,  	// DATA_FORMAT_BITS
	0x00, 0x64,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x5c,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x00, 0x64,
	0x05, 0x30, 0x30, 0x64, 0x00, 0x00,
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
	0x05, 0x30, 0x30, 0x40, 0xC0, 0x01,  	// READ_MODE
	//0x05, 0x30, 0x30, 0x70, 0x00, 0x02,  	// TEST PATTERN
};

uint8_t ar0820_extra_binning_setting[] = {
	0x05, 0x30, 0x32, 0xfc, 0x00, 0x03, // binning: dig h&v.
};

uint8_t ar0820_extra_binning10_setting[] = {
	0x05, 0x30, 0x32, 0xfc, 0x00, 0x0a, // binning: ana.
};

static uint8_t ar0820_weight_9331_scaling_setting[] = {
	0x05, 0x30, 0x30, 0x32, 0x00, 0x02, // scaling: h&v.
	0x05, 0x30, 0x30, 0x6e, 0x00, 0x00, // scaling: weight 9:3:3:1.
};

static uint8_t ar0820_true_bayer_scaling_setting[] = {
	0x05, 0x30, 0x30, 0x32, 0x00, 0x02, // scaling: h&v.
	0x05, 0x30, 0x30, 0x6e, 0x00, 0x10, // scaling: true bayer.
};

static uint8_t ar0820_weight_2110_scaling_setting[] = {
	0x05, 0x30, 0x30, 0x32, 0x00, 0x02, // scaling: h&v.
	0x05, 0x30, 0x30, 0x6e, 0x00, 0x20, // scaling: weight 2:1:1:0.
};

uint8_t ar0820_extra_linear_hts_vts_setting[] = {
	0x05, 0x30, 0x30, 0x0c, 0xb6, 0x80, // HTS: 46720.
	0x05, 0x30, 0x30, 0x0a, 0x85, 0x60, // VTS: 34144.
};

uint8_t ar0820_extra_pwl_hts_vts_setting[] = {
	0x05, 0x30, 0x30, 0x0c, 0x2c, 0x80, // HTS: 11392.
	0x05, 0x30, 0x30, 0x0a, 0x47, 0x52,  // VTS: 18258.
};

uint8_t ar0820_stream_on_setting[] = {
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x5c,
};

uint8_t ar0820_stream_off_setting[] = {
	0x05, 0x30, 0x30, 0x1a, 0x00, 0x58,
};

uint8_t ar0820_sync_stream_off_setting[] = {
	0x05, 0x30, 0x30, 0x1a, 0x08, 0x58,
};

typedef struct _reg_info {
	uint8_t *setting;
	int size;
} REG_INFO;
#define REG_I(x) { x, sizeof(x)/sizeof(x[0]) }
REG_INFO ar0820_extra_2160p_linear_init_s[] = {
	REG_I(ar0820_extra_max20087_init_setting),
	REG_I(ar0820_extra_max9295_init_setting),
	REG_I(ar0820_extra_max9296_init_setting),
	REG_I(ar0820_extra_linear_2160p_30fps_init_setting),
	REG_I(ar0820_extra_linear_hts_vts_setting),
};
REG_INFO ar0820_extra_1080p_linear_init_s[] = {
	REG_I(ar0820_extra_max20087_init_setting),
	REG_I(ar0820_extra_max9295_init_setting),
	REG_I(ar0820_extra_max9296_init_setting),
	REG_I(ar0820_extra_linear_2160p_30fps_init_setting),
	REG_I(ar0820_extra_linear_hts_vts_setting),
	REG_I(ar0820_extra_binning_setting),
};
REG_INFO ar0820_extra_2160p_pwl_init_s[] = {
	REG_I(ar0820_extra_max20087_init_setting),
	REG_I(ar0820_extra_max9295_init_setting),
	REG_I(ar0820_extra_max9296_init_setting),
	REG_I(ar0820_extra_pwl_2160p_30fps_init_setting),
	REG_I(ar0820_extra_pwl_hts_vts_setting),
};
REG_INFO ar0820_extra_1080p_pwl_init_s[] = {
	REG_I(ar0820_extra_max20087_init_setting),
	REG_I(ar0820_extra_max9295_init_setting),
	REG_I(ar0820_extra_max9296_init_setting),
	REG_I(ar0820_extra_pwl_2160p_30fps_init_setting),
	REG_I(ar0820_extra_pwl_hts_vts_setting),
	REG_I(ar0820_extra_binning_setting),
};

REG_INFO ar0820_extra_start_s[] = {
	REG_I(ar0820_extra_max9296_stream_on_setting),
	REG_I(ar0820_extra_max9295_stream_on_setting),
	REG_I(ar0820_stream_on_setting),
};
REG_INFO ar0820_extra_stop_s[] = {
	REG_I(ar0820_stream_off_setting),
	REG_I(ar0820_extra_max9295_stream_off_setting),
	REG_I(ar0820_extra_max9296_stream_off_setting),
};

uint32_t max9295_trigger_setting[] = {
    0x02D3, 0xf4,  // 1M,High prio,Jitter,ouput 1,GMSL2 rx,ouput en
    0x02D4, 0x67,  // pullup,push-pull,id = 7
    0x02D5, 0x07,  // id = 7
};

static uint16_t max9296_trigger_mfp[] = {
	0x02B1, 0xa7,  // pulldown,push-pull,id = 7
	0x02B2, 0x07,  // id = 7
	0x02B0, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
};

static uint16_t max9296_trigger_mfp8[] = {
	0x02C9, 0xa7,  // pulldown,push-pull,id = 7
	0x02Ca, 0x07,  // id = 7
	0x02C8, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
};

static uint16_t max9296_trigger_mfp7[] = {
	0x02C6, 0xa7,  // pulldown,push-pull,id = 7
	0x02C7, 0x07,  // id = 7
	0x02C5, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
};

static uint16_t max9296_trigger_mfp5[] = {
	0x0003, 0x40,  // pulldown,push-pull,id = 7
	0x02C0, 0xa7,  // pulldown,push-pull,id = 7
	0x02C1, 0x07,  // id = 7
	0x02bf, 0xeb,  // 1M,High prio,Jitter,output 0,GMSL2 tx
};

uint16_t ar0820_trigger_standard_setting[] = {
    //0x301A, 0x0058,  // RESET_REGISTER_RESET,RESET_REGISTER_STDBY_EOF
    0x301A, 0x0958,  // RESET_REGISTER_GPI_EN, FORCED_PLL_ON
    0x31C6, 0x2000,  // MASK_FRAMER_STANDBY
    0x30B0, 0x8100,  // PIXCLK_ON
    0x30CE, 0x0000,  // TRIGGER STANDARD MODE
    0x30CE, 0x0000,  // TRIGGER STANDARD MODE
};

uint16_t ar0820_trigger_shutter_sync_setting[] = {
    //0x301A, 0x0058,  // RESET_REGISTER_RESET,RESET_REGISTER_STDBY_EOF
    0x301A, 0x095C,  // RESET_REGISTER_GPI_EN, FORCED_PLL_ON, STREAM
    0x31C6, 0x2000,  // MASK_FRAMER_STANDBY
    0x30B0, 0x8100,  // PIXCLK_ON
    0x30CE, 0x0120,  // TRIGGER SHUTTER SYNC MODE
    0x30CE, 0x0120,  // TRIGGER SHUTTER SYNC MODE
};

uint16_t ar0820_trigger_gpio_setting[][8] = {
	{
		0x340A, 0x00EE,  // GPIO0_INPUT_ENABLE
		0x340A, 0x00EE,  // GPIO0_INPUT_ENABLE
		0x340C, 0x0002,  // GPIO_ISEL
		0x340E, 0x2100,  // GPIO_OSEL
	},
	{
		0x340A, 0x00DD,  // GPIO1_INPUT_ENABLE
		0x340A, 0x00DD,  // GPIO1_INPUT_ENABLE
		0x340C, 0x0008,  // GPIO_ISEL
		0x340E, 0x2100,  // GPIO_OSEL
	},
	{
		0x340A, 0x00BB,  // GPIO2_INPUT_ENABLE
		0x340A, 0x00BB,  // GPIO2_INPUT_ENABLE
		0x340C, 0x0020,  // GPIO_ISEL
		0x340E, 0x2010,  // GPIO_OSEL
	},
	{
		0x340A, 0x0077,  // GPIO3_INPUT_ENABLE
		0x340A, 0x0077,  // GPIO3_INPUT_ENABLE
		0x340C, 0x0080,  // GPIO_ISEL
		0x340E, 0x0210,  // GPIO_OSEL
	},
};

uint8_t ar0820_enalbe_embedded[] = {
	0x05, 0x30, 0x30, 0x64, 0x01, 0x00,
};
uint8_t ar0820_datatype_raw16[] = {
	0x05, 0x30, 0x30, 0x36, 0x00, 0x08,
	0x05, 0x30, 0x31, 0xac, 0x10, 0x10,
	0x05, 0x30, 0x33, 0x42, 0x12, 0x2e,
	0x05, 0x30, 0x30, 0x0c, 0x17, 0x20,
};

#endif  // UTILITY_SENSOR_INC_AR0820_SETTING_H_
